參數(shù)資料
型號: AD5532HSABCZ
廠商: Analog Devices Inc
文件頁數(shù): 1/12頁
文件大?。?/td> 0K
描述: IC DAC 14BIT 32CH HS 74-CSPBGA
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
標(biāo)準(zhǔn)包裝: 1
設(shè)置時間: 10µs
位數(shù): 14
數(shù)據(jù)接口: 串行
轉(zhuǎn)換器數(shù)目: 34
電壓電源: 模擬和數(shù)字
功率耗散(最大): 623mW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 74-LBGA,CSPBGA
供應(yīng)商設(shè)備封裝: 74-CSPBGA(12x12)
包裝: 托盤
輸出數(shù)目和類型: 32 電壓,單極
采樣率(每秒): 1.1M
配用: EVAL-AD5532HSEBZ-ND - BOARD EVAL FOR AD5532HS
EVAL-AD5532EBZ-ND - BOARD EVAL FOR AD5532
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
a
AD5532HS
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
Analog Devices, Inc., 2001
32-Channel 14-Bit DAC with
High-Speed 3-Wire Serial Interface
FUNCTIONAL BLOCK DIAGRAM
DAC
R
VDD
VSS
R
VOUT0
VOUT1
VOUT30
VOUT31
14-BIT
B
US
RESET
DAC_GND
AGND
DGND
DVCC
AVCC
REF_IN
OFFS_IN
INTERFACE
CONTROL
LOGIC
AD5532HS
DAC
DIN
SCLK
SYNC
FEATURES
High Integration: 32-Channel DAC in 12
12 mm2 LFBGA
Guaranteed Monotonic
DSP-/Microcontroller-Compatible Serial Interface
Channel Update Rate 1.1 MHz
Output Impedance 0.5
Selectable Output Voltage 0 V to 5 V or –2.5 V to +2.5 V
Asynchronous
RESET Facility
Temperature Range –40 C to +85 C
APPLICATIONS
Optical Networks
Level Setting
Instrumentation
Automatic Test Equipment
Industrial Control Systems
Data Acquisition
Low Cost I/O
GENERAL DESCRIPTION
The AD5532HS is a 32-channel voltage-output 14-bit DAC
with a high-speed serial interface. The selected DAC register is
written to via the 3-wire interface. The serial interface operates
at clock rates up to 30 MHz and is compatible with DSP and
microcontroller interface standards. The output voltage range is
0 V to 5 V or –2.5 V to +2.5 V and is determined by the offset
voltage at the OFFS_IN pin. It is restricted to a range from
VSS + 2 V to VDD – 2 V because of the headroom of the out-
put amplifier.
The device is operated with AVCC = 5 V
± 5%, DVCC = 2.7 V
to 5.25 V, VSS = –4.75 V to –12 V and VDD = +4.75 V to +12 V
and requires a stable 2.5 V reference on REF_IN.
PRODUCT HIGHLIGHTS
1. 32 14-bit DACs in one package, guaranteed monotonic.
2. The AD5532HS is available in a 74-ball LFBGA package
with a body size of 12 mm by 12 mm.
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