參數(shù)資料
型號(hào): AD5680BRJZ-1500RL7
廠商: Analog Devices Inc
文件頁(yè)數(shù): 6/20頁(yè)
文件大?。?/td> 0K
描述: IC DAC 18BIT 5V SOT23-8
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
標(biāo)準(zhǔn)包裝: 1
系列: nanoDAC™
設(shè)置時(shí)間: 80µs
位數(shù): 18
數(shù)據(jù)接口: DSP,MICROWIRE?,QSPI?,串行,SPI?
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 單電源
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: SOT-23-8
供應(yīng)商設(shè)備封裝: SOT-23-8
包裝: 標(biāo)準(zhǔn)包裝
輸出數(shù)目和類型: 1 電壓,單極
配用: EVAL-AD5680EBZ-ND - BOARD EVAL FOR AD5680
其它名稱: AD5680BRJZ-1500RL7DKR
AD5680
Data Sheet
APPLICATIONS INFORMATION
CLOSED-LOOP APPLICATIONS
The AD5680 is suitable for closed-loop low bandwidth applica-
tions. Ideally, the system bandwidth acts as a filter on the DAC
output. (See the Filter section for details of the DAC output
prefiltering and postfiltering.) The DAC updates at the
interpolation frequency of 10 kHz.
05854-
039
CONTROLLER
PLANT
ADC
DAC
Figure 32. Typical Closed-Loop Application
FILTER
The DAC output voltage for code transition 4092 to 4094 can be
seen in Figure 33. This is the DAC output unfiltered. Code 4092
does not have any interpolation but Code 4094 has interpolation
with a 50% duty cycle (see Table 5). Figure 34 shows the DAC
output with a 50 Hz passive RC filter and Figure 35 shows the
output with a 300 Hz passive RC filter. An RC combination of
320 k and 10 nF has been used to achieve the 50 Hz cutoff
frequency, and an RC combination of 81 k and 10 nF has
been used to achieve the 300 Hz cutoff frequency.
05854-
024
CH1 20.0V
M 500s
CH4
0V
1
CODE 4092
CODE 4094
Figure 33. DAC Output Unfiltered
05854-
025
1
CODE 4092
CODE 4094
Δ: 2.09ms
@: 1.28ms
CH1 20.0V CH2 5V
M 500s
CH2
1.4V
2
Figure 34. DAC Output with 50 Hz Filter on Output
05854-
026
1
CODE 4092
CODE 4094
Δ: 2.09ms
@: 1.28ms
CH1 20.0V CH2 5V
M 500s
CH2
1.4V
2
Figure 35. DAC Output with 300 Hz Filter on Output
Rev. B | Page 14 of 20
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