參數(shù)資料
型號: AD5680BRJZ-1500RL7
廠商: Analog Devices Inc
文件頁數(shù): 8/20頁
文件大?。?/td> 0K
描述: IC DAC 18BIT 5V SOT23-8
產(chǎn)品培訓模塊: Data Converter Fundamentals
DAC Architectures
標準包裝: 1
系列: nanoDAC™
設(shè)置時間: 80µs
位數(shù): 18
數(shù)據(jù)接口: DSP,MICROWIRE?,QSPI?,串行,SPI?
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 單電源
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: SOT-23-8
供應商設(shè)備封裝: SOT-23-8
包裝: 標準包裝
輸出數(shù)目和類型: 1 電壓,單極
配用: EVAL-AD5680EBZ-ND - BOARD EVAL FOR AD5680
其它名稱: AD5680BRJZ-1500RL7DKR
AD5680
Data Sheet
USING A REFERENCE AS A POWER SUPPLY FOR
Because the supply current required by the AD5680 is extremely
low, an alternative option is to use a voltage reference to supply
the required voltage to the part (see Figure 36). This is especially
useful if the power supply is quite noisy, or if the system supply
voltages are at some value other than 5 V, for example, 15 V.
The voltage reference outputs a steady supply voltage for the
AD5680; see Table 6 for a suitable reference. If the low dropout
REF195 is used, it must supply 325 A of current to the AD5680,
with no load on the output of the DAC. When the DAC output
is loaded, the REF195 also needs to supply the current to the
load. The total current required (with a 5 k load on the DAC
output) is
325 A + (5 V/5 k) = 1.33 mA
The load regulation of the REF195 is typically 2 ppm/mA,
which results in a 2.7 ppm (13.5 V) error for the 1.33 mA
current drawn from it. This corresponds to a 0.177 LSB error.
AD5680
SYNC
SCLK
DIN
15V
5V
VOUT = 0V TO 5V
VREF
VDD
REF195
05854-
040
250A
3-WIRE
SERIAL
INTERFACE
Figure 36. REF195 as Power Supply to the AD5680
USING THE AD5680 WITH A GALVANICALLY
ISOLATED INTERFACE
In process-control applications in industrial environments, it is
often necessary to use a galvanically isolated interface to protect
and isolate the controlling circuitry from any hazardous common-
mode voltages that might occur in the area where the DAC is
functioning. Isocouplers provide isolation in excess of 3 kV. The
AD5680 uses a 3-wire serial logic interface, so the ADuM130x
3-channel digital isolator provides the required isolation (see
Figure 37). The power supply to the part also needs to be isolated,
which is done by using a transformer. On the DAC side of the
transformer, a 5 V regulator provides the 5 V supply required
for the AD5680.
0.1F
5V
REGULATOR
GND
05854-
041
DIN
SYNC
SCLK
POWER
10F
SDI
SCLK
DATA
AD5680
VOUT
VOB
VOA
VOC
VDD
VIC
VIB
VIA
ADuM130x
Figure 37. AD5680 with a Galvanically Isolated Interface
POWER SUPPLY BYPASSING AND GROUNDING
When accuracy is important in a circuit, it is helpful to carefully
consider the power supply and ground return layout on the board.
The printed circuit board containing the AD5680 should have
separate analog and digital sections, each having its own area of
the board. If the AD5680 is in a system where other devices
require an AGND-to-DGND connection, the connection should
be made at one point only. This ground point should be as close
as possible to the AD5680.
The power supply to the AD5680 should be bypassed with 10 F
and 0.1 F capacitors. The capacitors should be located as close
as possible to the device, with the 0.1 F capacitor ideally right
up against the device. The 10 F capacitors should be the tanta-
lum bead type. It is important that the 0.1 F capacitor has low
effective series resistance (ESR) and effective series inductance
(ESI), for example, common ceramic types of capacitors. This
0.1 F capacitor provides a low impedance path to ground for
high frequencies caused by transient currents due to internal
logic switching.
The power supply line itself should have as large a trace as
possible to provide a low impedance path and to reduce glitch
effects on the supply line. Clocks and other fast switching digital
signals should be shielded from other parts of the board by
digital ground. Avoid crossover of digital and analog signals if
possible. When traces cross on opposite sides of the board,
ensure that they run at right angles to each other to reduce
feedthrough effects on the board. The best board layout tech-
nique is the microstrip technique where the component side of
the board is dedicated to the ground plane only and the signal
traces are placed on the solder side. However, this is not always
possible with a 2-layer board.
Rev. B | Page 16 of 20
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