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參數(shù)資料
| 型號： | AD5744RCSUZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 11/32頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 4CH 14BIT SER 1LSB 32TQFP |
| 產(chǎn)品培訓(xùn)模塊： | Data Converter Fundamentals DAC Architectures |
| 產(chǎn)品變化通告： | AD5764(R), AD5744R Product Change 04/Sept/2009 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 設(shè)置時間： | 10µs |
| 位數(shù)： | 14 |
| 數(shù)據(jù)接口： | 串行 |
| 轉(zhuǎn)換器數(shù)目： | 4 |
| 電壓電源： | 模擬和數(shù)字，雙 ± |
| 功率耗散（最大）： | 387mW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-TQFP |
| 供應(yīng)商設(shè)備封裝： | 32-TQFP（7x7） |
| 包裝： | 管件 |
| 輸出數(shù)目和類型： | 4 電壓，雙極 |
| 采樣率（每秒）： | * |
| 產(chǎn)品目錄頁面： | 784 (CN2011-ZH PDF) |
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Data Sheet
AD5744R
Rev. E | Page 19 of 32
TERMINOLOGY
Relative Accuracy or Integral Nonlinearity (INL)
For the DAC, a measure of the maximum deviation, in LSBs,
from a straight line passing through the endpoints of the DAC
transfer function.
Differential Nonlinearity (DNL)
The difference between the measured change and the ideal 1 LSB
change between any two adjacent codes. A specified differential
nonlinearity of ±1 LSB maximum ensures monotonicity. This DAC
is guaranteed monotonic.
Monotonicity
A DAC is monotonic if the output either increases or remains
constant for increasing digital input code. The AD5744R is
monotonic over its full operating temperature range.
Bipolar Zero Error
The deviation of the analog output from the ideal half-scale
output of 0 V when the data register is loaded with 0x8000
(offset binary coding) or 0x0000 (twos complement coding).
Figure 22 shows a plot of bipolar zero error vs. temperature.
Bipolar Zero Temperature Coefficient
The measure of the change in the bipolar zero error with a
change in temperature. It is expressed as parts per million of
full-scale range per degree Celsius (ppm FSR/°C).
Full-Scale Error
The measure of the output error when full-scale code is loaded
to the data register. Ideally, the output voltage should be 2 ×
VREFIN 1 LSB. Full-scale error is expressed as a percentage of
full-scale range (% FSR).
Negative Full-Scale Error/Zero-Scale Error
The error in the DAC output voltage when 0x0000 (offset binary
coding) or 0x8000 (twos complement coding) is loaded to the
data register. Ideally, the output voltage should be 2 × VREFIN.
Figure 21 shows a plot of zero-scale error vs. temperature.
Output Voltage Settling Time
The amount of time it takes for the output to settle to a specified
level for a full-scale input change.
Slew Rate
A limitation in the rate of change of the output voltage. The output
slewing speed of a voltage output DAC is usually limited by the
slew rate of the amplifier used at its output. Slew rate is measured
from 10% to 90% of the output signal and is given in volts per
microsecond (V/μs).
Gain Error
A measure of the span error of the DAC. It is the deviation in
slope of the DAC transfer characteristic from the ideal, expressed
as a percentage of the full-scale range (% FSR). Figure 23 shows
a plot of gain error vs. temperature.
Total Unadjusted Error (TUE)
A measure of the output error, considering all the various
errors. Figure 19 shows a plot of total unadjusted error vs.
reference voltage.
Zero-Scale Error Temperature Coefficient
A measure of the change in zero-scale error with a change in
temperature. It is expressed as parts per million of full-scale
range per degree Celsius (ppm FSR/°C).
Gain Error Temperature Coefficient
A measure of the change in gain error with changes in tempera-
ture. It is expressed as parts per million of full-scale range per
degree Celsius (ppm FSR/°C).
Digital-to-Analog Glitch Energy
The impulse injected into the analog output when the input code
in the data register changes state. It is normally specified as the
area of the glitch in nanovolt-seconds (nV-sec) and is measured
when the digital input code is changed by 1 LSB at the major carry
transition (0x7FFF to 0x8000), as shown in Figure 28.
Digital Feedthrough
A measure of the impulse injected into the analog output of the
DAC from the digital inputs of the DAC but is measured when
the DAC output is not updated. It is specified in nanovolt-seconds
(nV-sec) and measured with a full-scale code change on the
data bus, that is, from all 0s to all 1s, and vice versa.
Power Supply Sensitivity
Indicates how the output of the DAC is affected by changes in
the power supply voltage.
DC Crosstalk
The dc change in the output level of one DAC in response to a
change in the output of another DAC. It is measured with a full-
scale output change on one DAC while monitoring another
DAC, and is expressed in least significant bits (LSBs).
DAC-to-DAC Crosstalk
The glitch impulse transferred to the output of one DAC due
to a digital code change and subsequent output change of
another DAC. This includes both digital and analog crosstalk.
It is measured by loading one of the DACs with a full-scale code
change (from all 0s to all 1s, and vice versa) with LDAC low and
monitoring the output of another DAC. The energy of the glitch
is expressed in nanovolt-seconds (nV-sec).
Channel-to-Channel Isolation
The ratio of the amplitude of the signal at the output of one DAC
to a sine wave on the reference input of another DAC. It is
measured in decibels (dB).
Reference Temperature Coefficient
A measure of the change in the reference output voltage with
a change in temperature. It is expressed in parts per million per
degree Celsius (ppm/°C).
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| AD5744RCSUZ-REEL7 | 功能描述:IC DAC QUAD 14BIT 1LSB 32TQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Data Converter Fundamentals DAC Architectures 標(biāo)準(zhǔn)包裝:750 系列:- 設(shè)置時間:7µs 位數(shù):16 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 電壓電源:雙 ± 功率耗散（最大）:100mW 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-LCC（J 形引線） 供應(yīng)商設(shè)備封裝:28-PLCC（11.51x11.51） 包裝:帶卷 (TR) 輸出數(shù)目和類型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:143k |
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