參數(shù)資料
型號(hào)： AD5755-1ACPZ-REEL7
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 20/52頁(yè)
文件大?。?/td> 0K
描述： IC DAC 16BIT SERIAL 64LFCSP
視頻文件： AD5755: 16-Bit Multi-Channel, Voltage and Current Output DAC
標(biāo)準(zhǔn)包裝： 750
設(shè)置時(shí)間： 11µs
位數(shù)： 16
數(shù)據(jù)接口： DSP，MICROWIRE?，QSPI?，串行，SPI?
轉(zhuǎn)換器數(shù)目： 4
電壓電源： 模擬和數(shù)字，雙 ±
工作溫度： -40°C ~ 105°C
安裝類型： 表面貼裝
封裝/外殼： 64-VFQFN 裸露焊盤，CSP
供應(yīng)商設(shè)備封裝： 64-LFCSP-VQ（9x9）
包裝： 帶卷 (TR)
輸出數(shù)目和類型： 4 電流，4 電壓
采樣率（每秒）： *
Data Sheet
AD5755-1
Rev. E | Page 27 of 52
TERMINOLOGY
Relative Accuracy or Integral Nonlinearity (INL)
For the DAC, relative accuracy, or integral nonlinearity, is a
measure of the maximum deviation, in LSBs, from the best fit
line through the DAC transfer function. A typical INL vs. code
plot is shown in Figure 8.
Differential Nonlinearity (DNL)
Differential nonlinearity (DNL) is the difference between the
measured change and the ideal 1 LSB change between any two
adjacent codes. A specified differential nonlinearity of ±1 LSB
maximum ensures monotonicity. This DAC is guaranteed
monotonic by design. A typical DNL vs. code plot is shown in
Monotonicity
A DAC is monotonic if the output either increases or remains
constant for increasing digital input code. The AD5755-1 is
monotonic over its full operating temperature range.
Negative Full-Scale Error/Zero-Scale Error
Negative full-scale error is the error in the DAC output voltage
when 0x0000 (straight binary coding) is loaded to the DAC
register.
Zero-Scale TC
This is a measure of the change in zero-scale error with a change in
temperature. Zero-scale error TC is expressed in ppm FSR/°C.
Bipolar Zero Error
Bipolar zero error is the deviation of the analog output from the
ideal half-scale output of 0 V when the DAC register is loaded
with 0x8000 (straight binary coding).
Bipolar Zero TC
Bipolar zero TC is a measure of the change in the bipolar zero
error with a change in temperature. It is expressed in ppm
FSR/°C.
Offset Error
In voltage output mode, offset error is the deviation of the
analog output from the ideal quarter-scale output when in
bipolar output ranges and the DAC register is loaded with
0x4000 (straight binary coding).
In current output mode, offset error is the deviation of the
analog output from the ideal zero-scale output when all DAC
registers are loaded with 0x0000.
Gain Error
This is a measure of the span error of the DAC. It is the devia-
tion in slope of the DAC transfer characteristic from the ideal,
expressed in % FSR.
Gain TC
This is a measure of the change in gain error with changes in
temperature. Gain TC is expressed in ppm FSR/°C.
Full-Scale Error
Full-scale error is a measure of the output error when full-scale
code is loaded to the DAC register. Ideally, the output should be
full-scale 1 LSB. Full-scale error is expressed in percent of
full-scale range (% FSR).
Full-Scale TC
Full-scale TC is a measure of the change in full-scale error with
changes in temperature and is expressed in ppm FSR/°C.
Total Unadjusted Error
Total unadjusted error (TUE) is a measure of the output error
taking all the various errors into account, including INL error,
offset error, gain error, temperature, and time. TUE is expressed
in % FSR.
DC Crosstalk
This is the dc change in the output level of one DAC in response
to a change in the output of another DAC. It is measured with a
full-scale output change on one DAC while monitoring another
DAC, which is at midscale.
Current Loop Compliance Voltage
The maximum voltage at the IOUT_x pin for which the output
current is equal to the programmed value.
Voltage Reference Thermal Hysteresis
Voltage reference thermal hysteresis is the difference in output
voltage measured at +25°C compared to the output voltage
measured at +25°C after cycling the temperature from +25°C to
40°C to +105°C and back to +25°C. The hysteresis is specified
for the first and second temperature cycles and is expressed in ppm.
Output Voltage Settling Time
Output voltage settling time is the amount of time it takes for
the output to settle to a specified level for a full-scale input
change. A plot of settling time is shown in Figure 24, Figure 50,
Slew Rate
The slew rate of a device is a limitation in the rate of change of
the output voltage. The output slewing speed of a voltage-
output digital-to-analog converter is usually limited by the slew
rate of the amplifier used at its output. Slew rate is measured
from 10% to 90% of the output signal and is given in V/s.
Power-On Glitch Energy
Power-on glitch energy is the impulse injected into the analog
output when the AD5755-1 is powered-on. It is specified as the
area of the glitch in nV-sec. See Figure 29 and Figure 47.
Digital-to-Analog Glitch Impulse
Digital-to-analog glitch impulse is the impulse injected into the
analog output when the input code in the DAC register changes
state, but the output voltage remains constant. It is normally
specified as the area of the glitch in nV-sec and is measured
when the digital input code is changed by 1 LSB at the major
carry transition (~0x7FFF to 0x8000). See Figure 26.
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