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| 型號(hào)： | AD5755-1ACPZ-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 38/52頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 16BIT SERIAL 64LFCSP |
| 視頻文件： | AD5755: 16-Bit Multi-Channel, Voltage and Current Output DAC |
| 標(biāo)準(zhǔn)包裝： | 750 |
| 設(shè)置時(shí)間： | 11µs |
| 位數(shù)： | 16 |
| 數(shù)據(jù)接口： | DSP，MICROWIRE?，QSPI?，串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 4 |
| 電壓電源： | 模擬和數(shù)字，雙 ± |
| 工作溫度： | -40°C ~ 105°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 64-VFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 64-LFCSP-VQ（9x9） |
| 包裝： | 帶卷 (TR) |
| 輸出數(shù)目和類型： | 4 電流，4 電壓 |
| 采樣率（每秒）： | * |
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Data Sheet
AD5755-1
Rev. E | Page 43 of 52
POWER DISSIPATION CONTROL
The AD5755-1 contains integrated dynamic power control
using a dc-to-dc boost converter circuit, allowing reductions in
power consumption from standard designs when using the part
in current output mode.
In standard current input module designs, the load resistor
values can range from typically 50 to 750 . Output module
systems must source enough voltage to meet the compliance
voltage requirement across the full range of load resistor values.
For example, in a 4 mA to 20 mA loop when driving 20 mA, a
compliance voltage of >15 V is required. When driving 20 mA
into a 50 load, only 1 V compliance is required.
The AD5755-1 circuitry senses the output voltage and regulates
this voltage to meet compliance requirements plus a small
headroom voltage. The AD5755-1 is capable of driving up to
24 mA through a 1 k load.
DC-TO-DC CONVERTERS
The AD5755-1 contains four independent dc-to-dc converters.
These are used to provide dynamic control of the VBOOST supply
voltage for each channel (see Figure 73). Figure 80 shows the
discrete components needed for the dc-to-dc circuitry, and the
following sections describe component selection and operation
of this circuitry.
AVCC
LDCDC
DDCDC
CDCDC
4.7F
CFILTER
0.1F
RFILTER
CIN
SWx
VBOOST_X
≥10F
10
10H
09226-
077
Figure 80. DC-to-DC Circuit
Table 34. Recommended DC-to-DC Components
Symbol
Component
Value
Manufacturer
L
DCDC
XAL4040-103
10 H
Coilcraft
C
DCDC
GRM32ER71H475KA88L
4.7 F
Murata
D
DCDC
PMEG3010BEA
0.38 V
F
NXP
It is recommended to place a 10 , 100 nF low-pass RC filter
after CDCDC. This consumes a small amount of power but
reduces the amount of ripple on the VBOOST_x supply.
DC-to-DC Converter Operation
The on-board dc-to-dc converters use a constant frequency,
peak current mode control scheme to step up an AVCC input of
4.5 V to 5.5 V to drive the AD5755-1 output channel. These are
designed to operate in discontinuous conduction mode (DCM)
with a duty cycle of <90% typical. Discontinuous conduction
mode refers to a mode of operation where the inductor current
goes to zero for an appreciable percentage of the switching
cycle. The dc-to-dc converters are nonsynchronous; that is, they
require an external Schottky diode.
DC-to-DC Converter Output Voltage
When a channel current output is enabled, the converter regulates
the VBOOST_x supply to 7.4 V (±5%) or (IOUT × RLOAD + Headroom),
whichever is greater (see Figure 53 for a plot of headroom
supplied vs. output current). In voltage output mode with the
output disabled, the converter regulates the VBOOST_x supply to
+15 V (±5%). In current output mode with the output disabled,
the converter regulates the VBOOST_x supply to 7.4 V (±5%).
Within a channel, the VOUT_x and IOUT_x stages share a common
VBOOST_x supply so that the outputs of the IOUT_x and VOUT_x stages
can be tied together.
DC-to-DC Converter Settling Time
When in current output mode, the settling time for a step greater
than ~1 V (IOUT × RLOAD) is dominated by the settling time of the
dc-to-dc converter. The exception to this is when the required
voltage at the IOUT_x pin plus the compliance voltage is below
7.4 V (±5%). A typical plot of the output settling time can be
found in Figure 49. This plot is for a 1 k load. The settling time
for smaller loads is faster. The settling time for current steps less
than 24 mA is also faster.
DC-to-DC Converter VMAX Functionality
The maximum VBOOST_x voltage is set in the dc-to-dc control
register (23 V, 24.5 V, 27 V, or 29.5 V; see Table 25). On reaching
this maximum voltage, the dc-to-dc converter is disabled, and
the VBOOST_x voltage is allowed to decay by ~0.4 V. After the
VBOOST_x voltage has decayed by ~0.4 V, the dc-to-dc converter
is reenabled, and the voltage ramps up again to VMAX, if still
required. This operation is shown in Figure 81.
28.6
28.7
28.8
28.9
29.0
29.1
29.2
29.3
29.4
29.5
29.6
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
V
B
OOS
T
VO
LT
A
G
E
(V)
TIME (ms)
VMAX
0mA TO 24mA RANGE, 24mA OUTPUT
OUTPUT UNLOADED
DC-DCMaxV = 11 (29.5V)
DC_DC BIT
09226-
183
DCDCx BIT = 0
DCDCx BIT = 1
f
SW = 410kHz
TA = 25°C
Figure 81. Operation on Reaching VMAX
As can be seen in Figure 81, the DC-DCx bit in the status register
asserts when the AD5755-1 is ramping to the VMAX value but
deasserts when the voltage is decaying to VMAX ~0.4 V.
DC-to-DC Converter On-Board Switch
The AD5755-1 contains a 0.425 internal switch. The switch
current is monitored on a pulse by pulse basis and is limited to
0.8 A peak current.
DC-to-DC Converter Switching Frequency and Phase
The AD5755-1 dc-to-dc converter switching frequency can be
selected from the dc-to-dc control register. The phasing of the
channels can also be adjusted so that the dc-to-dc converter can
clock on different edges (see Table 25). For typical applications,
a 410 kHz frequency is recommended. At light loads (low output
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