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參數(shù)資料
型號(hào)： AD5755BCPZ-REEL7
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 51/52頁(yè)
文件大?。?/td> 0K
描述： IC DAC 16BIT QUAD 64-LFCSP
視頻文件： AD5755: 16-Bit Multi-Channel, Voltage and Current Output DAC
標(biāo)準(zhǔn)包裝： 750
設(shè)置時(shí)間： 11µs
位數(shù)： 16
數(shù)據(jù)接口： DSP，MICROWIRE?，QSPI?，串行，SPI?
轉(zhuǎn)換器數(shù)目： 4
電壓電源： 模擬和數(shù)字，雙 ±
工作溫度： -40°C ~ 105°C
安裝類型： 表面貼裝
封裝/外殼： 64-VFQFN 裸露焊盤，CSP
供應(yīng)商設(shè)備封裝： 64-LFCSP-VQ（9x9）
包裝： 帶卷 (TR)
輸出數(shù)目和類型： 4 電流，4 電壓
采樣率（每秒）： *
AD5755
Data Sheet
Rev. C | Page 8 of 52
Parameter1
Min
Typ
Max
Unit
Test Conditions/Comments
AVCC
4.5
5.5
V
AIDD
8.6
10.5
mA
Voltage output mode on all channels, output
unloaded, over supplies
7
7.5
mA
Current output mode on all channels,
AISS
11
8.8
mA
Voltage output mode on all channels, output
unloaded, over supplies
1.7
mA
Current output mode on all channels
DICC
9.2
11
mA
VIH = DVDD, VIL = DGND, internal oscillator running,
over supplies
AICC
1
mA
Output unloaded, over supplies
2.7
mA
Per channel, voltage output mode, output
unloaded, over supplies
1
mA
Per channel, current output mode
Power Dissipation
173
mW
AVDD = 15 V, AVSS = 15 V, dc-to-dc converter
enable, current output mode, outputs disabled
1
Temperature range: 40°C to +105°C; typical at +25°C.
2
Guaranteed by design and characterization; not production tested.
3
For current outputs with internal RSET, the offset, full-scale, and TUE measurements exclude dc crosstalk. The measurements are made with all four channels enabled
loaded with the same code.
4
See the Current Output Mode with Internal RSET section for more explanation of the dc crosstalk.
5
Efficiency plots in Figure 54, Figure 55, Figure 56, and Figure 57 include the IBOOST quiescent current.
AC PERFORMANCE CHARACTERISTICS
AVDD = VBOOST_x = 15 V; AVSS = 15 V; DVDD = 2.7 V to 5.5 V; AVCC = 4.5 V to 5.5 V; dc-to-dc converter disabled; AGND = DGND =
GNDSWx = 0 V; REFIN = 5 V; voltage outputs: RL = 2 k, CL = 220 pF; current outputs: RL = 300 ; all specifications TMIN to TMAX, unless
otherwise noted.
Table 2.
Parameter1
Min
Typ
Max
Unit
Test Conditions/Comments
DYNAMIC PERFORMANCE
Voltage Output
Output Voltage Settling Time
11
s
5 V step to ±0.03% FSR, 0 V to 5 V range
18
s
10 V step to ±0.03% FSR, 0 V to 10 V range
13
s
100 mV step to 1 LSB (16-bit LSB), 0 V to 10 V
range
Slew Rate
1.9
V/s
0 V to 10 V range
Power-On Glitch Energy
150
nV-sec
Digital-to-Analog Glitch Energy
6
nV-sec
Glitch Impulse Peak Amplitude
25
mV
Digital Feedthrough
1
nV-sec
DAC to DAC Crosstalk
2
nV-sec
0 V to 10 V range
Output Noise (0.1 Hz to 10 Hz
Bandwidth)
0.15
LSB p-p
16-bit LSB, 0 V to 10 V range
Output Noise Spectral Density
150
nV/√Hz
Measured at 10 kHz, midscale output, 0 V to 10 V
range
AC PSRR
83
dB
200 mV 50 Hz/60 Hz sine wave superimposed on
power supply voltage
Current Output
Output Current Settling Time
15
s
To 0.1% FSR (0 mA to 24 mA)
See test conditions/
comments
ms
Output Noise (0.1 Hz to 10 Hz
Bandwidth)
0.15
LSB p-p
16-bit LSB, 0 mA to 24 mA range
Output Noise Spectral Density
0.5
nA/√Hz
Measured at 10 kHz, midscale output, 0 mA to
24 mA range
1
Guaranteed by design and characterization; not production tested.
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