參數(shù)資料
型號(hào)： AD6634PCB
廠商： Analog Devices, Inc.
元件分類： 基帶處理器
英文描述： 80 MSPS, Dual-Channel WCDMA Receive Signal Processor (RSP)
中文描述： 80 MSPS的雙通道的WCDMA接收信號(hào)處理器（RSP）
文件頁數(shù)： 26/52頁
文件大小： 925K
代理商： AD6634PCB
REV. 0
–26–
AD6634
f
f
N
SAMP
CLK
CH
2
≤
The decimation ratio, M
CIC5
, may be programmed from 2 to 32
(all integer values). The frequency response of the filter is given
by the following equations. The gain and pass-band droop of
CIC5 should be calculated by these equations. Both parameters
may be compensated for in the RCF stage.
H z
z
z
H f
M
f
f
f
f
S
M
S
CIC
SAMP
SAMP
CIC
CIC
CIC
=
1
=
×
+
+
1
2
1
1
2
5
5
5
5
1
5
5
5
2
2
5
sin
sin
π
π
The scale factor,
S
CIC5
is a programmable unsigned integer between
0 and 20. It serves to control the attenuation of the data into the
CIC5 stage in 6 dB increments. For the best dynamic range,
S
CIC5
should be set to the smallest value possible (lowest attenuation)
without creating an overflow condition. This can be safely accom-
plished using the following equation, where OL
rCIC2
is the largest
fraction of full scale possible at the input to this filter stage. This
value is output from the rCIC2 stage then pipelined into the CIC5.
(
=
(
+
S
ceil
M
)
×
OL
OL
M
OL
CIC
CIC
rCIC
rCIC
CIC
S
rCIC
CIC
5
2
5
5
2
2
5
5
5
2
5
2
5
=
×
)
log
–
The output rate of this stage is given by the equation below.
f
f
M
SAMP
SAMP
CIC
5
2
5
=
CIC5 Rejection
Table IV illustrates the amount of bandwidth in percentage of
the clock rate that can be protected with various decimation
rates and alias rejection specifications. The maximum input rate
into the CIC5 is 80 MHz when the rCIC2 decimates by 1. As in
the Table III, these are the one-half bandwidth characteristics of
the CIC5. Notice that the CIC5 stage can protect a much wider
band to any given rejection.
This table helps to calculate an upper bound on decimation,
M
CIC5
, given the desired filter characteristics.
Table IV. SSB CIC5 Alias Rejection Table (f
SAMP2
= 1)
MCIC5
–50 dB
–60 dB
–70 dB
–80 dB
–90 dB
–100 dB
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
10.227
7.924
6.213
5.068
4.267
3.68
3.233
2.881
2.598
2.365
2.17
2.005
1.863
1.74
1.632
1.536
1.451
1.375
1.307
1.245
1.188
1.137
1.09
1.046
1.006
0.969
0.934
0.902
0.872
0.844
0.818
8.078
6.367
5.022
4.107
3.463
2.989
2.627
2.342
2.113
1.924
1.765
1.631
1.516
1.416
1.328
1.25
1.181
1.119
1.064
1.013
0.967
0.925
0.887
0.852
0.819
0.789
0.761
0.734
0.71
0.687
0.666
6.393
5.11
4.057
3.326
2.808
2.425
2.133
1.902
1.716
1.563
1.435
1.326
1.232
1.151
1.079
1.016
0.96
0.91
0.865
0.824
0.786
0.752
0.721
0.692
0.666
0.641
0.618
0.597
0.577
0.559
0.541
5.066
4.107
3.271
2.687
2.27
1.962
1.726
1.54
1.39
1.266
1.162
1.074
0.998
0.932
0.874
0.823
0.778
0.737
0.701
0.667
0.637
0.61
0.584
0.561
0.54
0.52
0.501
0.484
0.468
0.453
0.439
4.008
3.297
2.636
2.17
1.836
1.588
1.397
1.247
1.125
1.025
0.941
0.87
0.809
0.755
0.708
0.667
0.63
0.597
0.568
0.541
0.516
0.494
0.474
0.455
0.437
0.421
0.406
0.392
0.379
0.367
0.355
3.183
2.642
2.121
1.748
1.48
1.281
1.128
1.007
0.909
0.828
0.76
0.703
0.653
0.61
0.572
0.539
0.509
0.483
0.459
0.437
0.417
0.399
0.383
0.367
0.353
0.34
0.328
0.317
0.306
0.297
0.287
相關(guān)PDF資料
PDF描述
AD6635 4-Channel, 80 MSPS WCDMA Receive Signal Processor (RSP)
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD6635 制造商:AD 制造商全稱:Analog Devices 功能描述:4-Channel, 80 MSPS WCDMA Receive Signal Processor (RSP)
AD6635BB 功能描述:IC RSP 80MSPS QUAD 324-BGA RoHS:否 類別:RF/IF 和 RFID >> RF 混頻器 系列:AD6635 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:100 系列:- RF 型:W-CDMA 頻率:2.11GHz ~ 2.17GHz 混頻器數(shù)目:1 增益:17dB 噪音數(shù)據(jù):2.2dB 次要屬性:- 電流 - 電源:11.7mA 電源電壓:2.7 V ~ 3.3 V 包裝:托盤 封裝/外殼:12-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:12-QFN-EP（3x3）
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AD6635BBZ 制造商:Analog Devices 功能描述:Receive Signal Processor 324-Pin BGA
AD6636 制造商:AD 制造商全稱:Analog Devices 功能描述:150 MSPS Wideband Digital Down-Converter (DDC)
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