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參數(shù)資料
| 型號： | AD6634PCB |
| 廠商： | Analog Devices, Inc. |
| 元件分類： | 基帶處理器 |
| 英文描述： | 80 MSPS, Dual-Channel WCDMA Receive Signal Processor (RSP) |
| 中文描述： | 80 MSPS的雙通道的WCDMA接收信號處理器（RSP） |
| 文件頁數(shù)： | 44/52頁 |
| 文件大?。?/td> | 925K |
| 代理商： | AD6634PCB |
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REV. 0
–44–
AD6634
Table XV. Memory Map for Output Port Control Registers (continued)
Channel
Address
Bit
Width
Register
Comments
16
17
18
AGC B Loop Gain
AGC B Pole Location
AGC B Average Samples
8
8
6
7–0:
7–0:
5–2:
1–0:
11–0: CIC Decimation
7–6:
Reserved
5:
Parallel Port Data Format
1:
8-Bit Parallel I, Q
0:
16-Bit Interleaved I, Q
4:
Channel 3
3:
Channel 2
2:
Channel 1/AGC B Enable
1:
Channel 0/AGC A Enable
0:
AGC_CH Select
1:
Data Comes from AGCs
0:
Data Comes from Channels
7:
Link Port A Enable
6–3:
Wait
2:
No RSSI Word
1:
Don’t Output RSSI Word
0:
Output RSSI Word
1:
Channel Data Interleaved
1:
2-Channel Mode/Separate AB
0:
4-Channel Mode/AB Same Port
0:
AGC_CH Select
1:
Data Comes from AGCs
0:
Data Comes from Channels
7–6: Reserved
5:
Parallel Port Data Format
1:
8-Bit Parallel I, Q
0:
16-Bit Interleaved I, Q
4:
Channel 3
3:
Channel 2
2:
Channel 1/AGC B Enable
1:
Channel 0/AGC A Enable
0:
AGC_CH Select
1:
Data Comes from AGCs
0:
Data Comes from Channels
7:
Link Port B Enable
6–3:
Wait
2:
No RSSI Word
1:
Don’t Output RSSI Word
0:
Output RSSI Word
1:
Channel Data Interleaved
1:
2-Channel Mode/Separate AB
0:
4-Channel Mode/AB Same Port
0:
AGC_CH Select
1:
Data Comes from AGCs
0:
Data Comes from Channels
2–1:
PCLK Divisor
0:
PCLK Master/Slave
*
0:
Slave
1:
Master
K Parameter
P Parameter
Scale for CIC Decimator
Number of Averaging Samples
19
1A
AGC B Update Decimation
Parallel A Control
12
8
1B
Link A Control
8
1C
Parallel B Control
8
1D
Link B Control
8
1E
Port Clock Control
3
*
PCLK boots as slave.
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| AD6635 | 4-Channel, 80 MSPS WCDMA Receive Signal Processor (RSP) |
| AD6635BB | 4-Channel, 80 MSPS WCDMA Receive Signal Processor (RSP) |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD6635 | 制造商:AD 制造商全稱:Analog Devices 功能描述:4-Channel, 80 MSPS WCDMA Receive Signal Processor (RSP) |
| AD6635BB | 功能描述:IC RSP 80MSPS QUAD 324-BGA RoHS:否 類別:RF/IF 和 RFID >> RF 混頻器 系列:AD6635 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:100 系列:- RF 型:W-CDMA 頻率:2.11GHz ~ 2.17GHz 混頻器數(shù)目:1 增益:17dB 噪音數(shù)據(jù):2.2dB 次要屬性:- 電流 - 電源:11.7mA 電源電壓:2.7 V ~ 3.3 V 包裝:托盤 封裝/外殼:12-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:12-QFN-EP（3x3） |
| AD6635BB/PCB | 制造商:Analog Devices 功能描述:Evaluation Kit For 4-Channel, 80MSPS WCDMA Receive Signal Processor |
| AD6635BBZ | 制造商:Analog Devices 功能描述:Receive Signal Processor 324-Pin BGA |
| AD6636 | 制造商:AD 制造商全稱:Analog Devices 功能描述:150 MSPS Wideband Digital Down-Converter (DDC) |
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