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參數資料
| 型號： | AD6634PCB |
| 廠商： | Analog Devices, Inc. |
| 元件分類： | 基帶處理器 |
| 英文描述： | 80 MSPS, Dual-Channel WCDMA Receive Signal Processor (RSP) |
| 中文描述： | 80 MSPS的雙通道的WCDMA接收信號處理器（RSP） |
| 文件頁數： | 39/52頁 |
| 文件大?。?/td> | 925K |
| 代理商： | AD6634PCB |
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REV. 0
AD6634
–39–
0x90: rCIC2 Decimation – 1 (M
rCIC2
– 1)
This register is used to set the decimation in the rCIC2 filter.
The value written to this register is the decimation minus one.
The rCIC2 decimation can range from 1 to 4096, depending
upon the interpolation of the channel. The decimation must
always be greater than the interpolation. M
rCIC2
must be chosen
larger than L
rCIC2
and both must be chosen such that a suitable
rCIC2 scalar can be chosen. For more details, the rCIC2 section
should be consulted.
0x91: rCIC2 Interpolation – 1 (L
rCIC2
– 1)
This register is used to set the interpolation in the rCIC2 filter.
The value written to this register is the interpolation minus one.
The rCIC2 interpolation can range from 1 to 512, depending
upon the decimation of the rCIC2. There is no timing error
associated with this interpolation. See the rCIC2 section for
further details.
0x92: rCIC2 Scale
The rCIC2 scale register is used to provide attenuation to com-
pensate for the gain of the rCIC2 and to adjust the linearization
of the data from the floating-point input. The use of this scale
register is influenced both by the rCIC2 growth and floating-
point input port considerations. The rCIC2 section should be
consulted for details. The rCIC2 scalar has been combined with
the exponent offset and will need to be handled appropriately in
both the input port and rCIC2 sections.
Bit 11 determines the polarity of the exponent. Normally, this
bit will be cleared unless an ADC such as the AD6600 is used,
in which case this bit will be set.
Bit 10 determines the weight of the exponent word associated
with the input port. When this bit is Low, each exponent step is
considered to be worth 6.02 dB. When this bit is High, each
exponent step is considered to be worth 12.02 dB.
Table XI. Channel Address Memory Map
Channel
Address
Bit
Width
Register
Comments
90
91
92
rCIC2 Decimation – 1
rCIC2 Decimation – 1
rCIC2 Scale
12
9
12
M
rCIC2
–1
L
rCIC2
–1
11: Exponent Invert
10: Exponent Weight
9–5: rCIC2_QUIET[4:0]
4–0: rCIC2_LOUD[4:0]
Reserved (Must Be Written Low)
M
CIC5
–1
4–0: CIC5_SCALE[4:0]
Reserved (Must Be Written Low)
93
94
95
96
97–9F
A0
A1
A2
A3
A4
Reserved
CIC5 Decimation – 1
CIC5 Scale
Reserved
Unused
RCF Decimation – 1
RCF Decimation Phase
RCF Number of Taps – 1
RCF Coefficient Offset
RCF Control Register
8
8
5
8
8
8
8
8
11
M
RCF
–1
P
RCF
N
TAPS
–1
CO
RCF
10: RCF Bypass BIST
9: RCF Input Select
(Own 0, Other 1)
8: Program RAM Bank 1/0
7: Use Common Exponent
6: Force Output Scale
5–4: Output Format
1x: Floating Point 12 + 4
01: Floating Point 8 + 4
00: Fixed Point
3–0:1Output Scale
BIST-I
BIST-Q
A5
A6
A7
BIST Signature for I Path
BIST Signature for Q Path
No. of BIST Outputs to
Accumulate
RAM BIST Control Register
16
16
20
3
19–0: No. of Outputs(Counter Value Read)
2: D-RAM Fail/Pass
1: NC-RAM Fail/Pass
0: RAM BIST Enable
9: Map RCF Data to BIST Registers
5: Output Format
1:16-Bit I and 16-Bit Q
0:12-Bit I and 12-Bit Q
A8
A9
Output Control Register
相關PDF資料 |
PDF描述 |
|---|---|
| AD6635 | 4-Channel, 80 MSPS WCDMA Receive Signal Processor (RSP) |
| AD6635BB | 4-Channel, 80 MSPS WCDMA Receive Signal Processor (RSP) |
| AD6636 | 150 MSPS Wideband Digital Down-Converter (DDC) |
| AD6636BBCZ1 | 150 MSPS Wideband Digital Down-Converter (DDC) |
| AD6636BC | 150 MSPS Wideband Digital Down-Converter (DDC) |
相關代理商/技術參數 |
參數描述 |
|---|---|
| AD6635 | 制造商:AD 制造商全稱:Analog Devices 功能描述:4-Channel, 80 MSPS WCDMA Receive Signal Processor (RSP) |
| AD6635BB | 功能描述:IC RSP 80MSPS QUAD 324-BGA RoHS:否 類別:RF/IF 和 RFID >> RF 混頻器 系列:AD6635 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:100 系列:- RF 型:W-CDMA 頻率:2.11GHz ~ 2.17GHz 混頻器數目:1 增益:17dB 噪音數據:2.2dB 次要屬性:- 電流 - 電源:11.7mA 電源電壓:2.7 V ~ 3.3 V 包裝:托盤 封裝/外殼:12-VFQFN 裸露焊盤 供應商設備封裝:12-QFN-EP（3x3） |
| AD6635BB/PCB | 制造商:Analog Devices 功能描述:Evaluation Kit For 4-Channel, 80MSPS WCDMA Receive Signal Processor |
| AD6635BBZ | 制造商:Analog Devices 功能描述:Receive Signal Processor 324-Pin BGA |
| AD6636 | 制造商:AD 制造商全稱:Analog Devices 功能描述:150 MSPS Wideband Digital Down-Converter (DDC) |
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