參數(shù)資料
型號: AD6653-125EBZ
廠商: Analog Devices, Inc.
英文描述: IF Diversity Receiver
中文描述: IF分集接收機
文件頁數(shù): 2/80頁
文件大小: 1998K
代理商: AD6653-125EBZ
AD6653
TABLE OF CONTENTS
Features..............................................................................................1
Applications.......................................................................................1
Product Highlights...........................................................................1
Functional Block Diagram..............................................................1
Revision History...............................................................................3
General Description.........................................................................4
Specifications.....................................................................................5
ADC DC Specifications...............................................................5
ADC AC Specifications...............................................................6
Digital Specifications ...................................................................7
Switching Specifications..............................................................9
Timing Specifications ................................................................10
Absolute Maximum Ratings..........................................................13
Thermal Characteristics............................................................13
ESD Caution................................................................................13
Pin Configurations and Function Descriptions.........................14
Equivalent Circuits.........................................................................18
Typical Performance Characteristics...........................................19
Theory of Operation......................................................................24
ADC Architecture......................................................................24
Analog Input Considerations....................................................24
Voltage Reference.......................................................................26
Clock Input Considerations......................................................27
Power Dissipation and Standby Mode.....................................29
Digital Outputs...........................................................................30
Digital Downconverter..................................................................31
Downconverter Modes..............................................................31
Numerically Controlled Oscillator (NCO).............................31
Half-Band Decimating Filter and FIR Filter...........................31
f
ADC
/8 Fixed-Frequency NCO...................................................31
Numerically Controlled Oscillator (NCO).................................32
Frequency Translation...............................................................32
NCO Synchronization ...............................................................32
Phase Offset.................................................................................32
NCO Amplitude and Phase Dither..........................................32
Decimating Half-Band Filter and FIR Filter...............................33
Half-Band Filter Coefficients....................................................33
Half-Band Filter Features..........................................................33
Fixed-Coefficient FIR Filter......................................................33
Rev. 0 | Page 2 of 80
Synchronization.......................................................................... 34
Combined Filter Performance.................................................. 34
Final NCO................................................................................... 34
ADC Overrange and Gain Control.............................................. 35
Fast Detect Overview................................................................. 35
ADC Fast Magnitude................................................................. 35
ADC Overrange (OR)................................................................ 36
Gain Switching............................................................................ 36
Signal Monitor................................................................................ 38
Peak Detector Mode................................................................... 38
RMS/MS Magnitude Mode....................................................... 38
Threshold Crossing Mode......................................................... 39
Additional Control Bits............................................................. 39
DC Correction............................................................................ 39
Signal Monitor SPORT Output................................................ 40
Channel/Chip Synchronization.................................................... 41
Serial Port Interface (SPI).............................................................. 42
Configuration Using the SPI..................................................... 42
Hardware Interface..................................................................... 42
Configuration Without the SPI................................................ 43
SPI Accessible Features.............................................................. 43
Memory Map .................................................................................. 44
Reading the Memory Map Register Table............................... 44
Memory Map Register Table..................................................... 45
Memory Map Register Description......................................... 49
Applications Information.............................................................. 53
Design Guidelines...................................................................... 53
Evaluation Board............................................................................ 55
Power Supplies............................................................................ 55
Input Signals................................................................................ 55
Output Signals ............................................................................ 55
Default Operation and Jumper Selection Settings................. 56
Alternative Clock Configurations............................................ 56
Alternative Analog Input Drive Configuration...................... 57
Schematics................................................................................... 58
Evaluation Board Layouts......................................................... 68
Bill of Materials........................................................................... 76
Outline Dimensions....................................................................... 78
Ordering Guide .......................................................................... 78
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