Table 5. AD7674 Absolute Maximum Ratings1 Paramet" />
參數(shù)資料
型號(hào): AD7674ASTZRL
廠商: Analog Devices Inc
文件頁數(shù): 26/28頁
文件大?。?/td> 0K
描述: IC ADC 18BIT 800KSPS 48-LQFP T/R
產(chǎn)品培訓(xùn)模塊: ADC Applications
ADC Architectures
ADC DC/AC Performance
標(biāo)準(zhǔn)包裝: 2,000
系列: PulSAR®
位數(shù): 18
采樣率(每秒): 800k
數(shù)據(jù)接口: 串行,并聯(lián)
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 138mW
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 48-LQFP
供應(yīng)商設(shè)備封裝: 48-LQFP(7x7)
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 1 個(gè)差分,雙極
配用: EVAL-AD7674CBZ-ND - BOARD EVALUATION FOR AD7674
AD7674
Rev. A | Page 7 of 28
ABSOLUTE MAXIMUM RATINGS
Table 5. AD7674 Absolute Maximum Ratings1
Parameter
Rating
Analog Inputs
IN+2, IN–2, REF, REFBUFIN,
REFGND to AGND
AGND – 0.3 V to
AVDD + 0.3 V
Ground Voltage Differences
AGND, DGND, OGND
±0.3 V
Supply Voltages
AVDD, DVDD, OVDD
–0.3 V to +7 V
AVDD to DVDD, AVDD to OVDD
±7 V
DVDD to OVDD
–0.3 V to +7 V
Digital Inputs
–0.3 V to DVDD + 0.3 V
Internal Power Dissipation3
700 mW
Internal Power Dissipation4
2.5 W
Junction Temperature
150°C
Storage Temperature Range
–65°C to +150°C
Lead Temperature Range
(Soldering 10 sec)
300°C
1Stresses above those listed under Absolute Maximum Ratings may cause
permanent damage to the device. This is a stress rating only; functional
operation of the device at these or any other conditions above those
indicated in the operational section of this specification is not implied.
Exposure to absolute maximum rating conditions for extended periods may
affect device reliability.
2See Analog Input section.
3Specification is for device in free air: 48-Lead LQFP: θJA = 91°C/W,
θJC = 30°C/W.
4 Specification is for device in free air: 48-Lead LFCSP: θJA = 26°C/W.
TO OUTPUT
PIN
CL
60pF1
500
μA
IOH
1.6mA
IOL
1.4V
IN SERIAL INTERFACE MODES,THE SYNC, SCLK, AND
SDOUT TIMINGS ARE DEFINED WITH A MAXIMUM LOAD
CL OF 10pF; OTHERWISE,THE LOAD IS 60pF MAXIMUM.
NOTE
1
03083–0–002
Figure 2. Load Circuit for Digital Interface Timing, SDOUT, SYNC, SCLK
Outputs, CL = 10 pF
0.8V
2V
0.8V
t
DELAY
2V
0.8V
t
DELAY
03083–0–003
Figure 3. Voltage Reference Levels for Timing
ESD CAUTION
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