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參數(shù)資料
| 型號(hào)： | AD9148BBCZRL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 35/72頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 16BIT QD 1GSPS 196CSPBGA |
| 標(biāo)準(zhǔn)包裝： | 1,500 |
| 系列： | TxDAC+® |
| 設(shè)置時(shí)間： | 20ns |
| 位數(shù)： | 16 |
| 數(shù)據(jù)接口： | 串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 4 |
| 電壓電源： | 模擬和數(shù)字 |
| 功率耗散（最大）： | 2.22W |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 196-LFBGA，CSPBGA |
| 供應(yīng)商設(shè)備封裝： | 196-CSPBGA（12x12） |
| 包裝： | 帶卷 (TR) |
| 輸出數(shù)目和類型： | 8 電流，單極 |
| 采樣率（每秒）： | 1G |
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AD9148
Data Sheet
Rev. B | Page 40 of 72
INPUT DATA PORTS
The AD9148 can operate in three data input modes: dual-port
mode, single-port mode, and byte mode. In dual-port mode,
DAC 1 and DAC 2 receive data from Port A, and DAC 3 and
DAC 4 receive data from Port B. In single-port mode, all four
DACs receive data from Port A. In byte mode, all four DACs
receive data from Port A, but the port is split into two 8-bit wide
buses. In all modes, the data input timing is relative to a DCI signal
provided with the data.
DUAL-PORT MODE
In dual-port mode, the DCI signal indicates to which DAC the
data is intended. On the rising edge of DCI, data is latched into
DAC 1 and DAC 3. On the falling edge of DCI, data is latched
into DAC 2 and DAC 4. This pattern repeats continuously.
There is a SPI programmable option (Register 0x14[6]) to provide
one DCI for both input ports or two DCIs, where each DCI is
associated with one input port. Two DCIs are useful when the
data for each port is coming from a different data source. These
cases are illustrated in Figure 45 and Figure 46.
DCIA
A[15:0]
DAC1
DAC2
DAC1
DAC2
DAC1
DAC2
DAC1
DAC2
DAC3
DAC4
DAC3
DAC4
DAC3
DAC4
DAC3
DAC4
B[15:0]
08910-
045
Figure 45. Timing Diagram for Dual-Port Mode, One DCI
DCIA
A[15:0]
DAC1
DAC2
DAC1
DAC2
DAC1
DAC2
DAC1
DAC2
DAC3
DAC4
DAC3
DAC4
DAC3
DAC4
DAC3
DAC4
B[15:0]
DCIB
08910-
046
Figure 46. Timing Diagram for Dual-Port Mode, Two DCI
Each data sample, by default, is expected to be formatted as an
MSB sent to Bit 15 and an LSB sent to Bit 0 for each port. The
AD9148 contains an option to swap the bus (Register 0x03[4]).
When this bus swap bit is set, the MSB should be sent to Bit 0,
and the LSB should be sent to Bit 15 for each port.
SINGLE-PORT MODE
In single-port mode, a FRAME signal must be provided along
with the DCI signal and the data. The FRAME signal indicates
to which DAC the data is intended. When FRAME goes high,
the first data-word goes to DAC 1, and the second data-word
goes to DAC 2. When FRAME goes low, the first data-word
goes to DAC 3, and the second data-word goes to DAC 4.
This pattern repeats continuously as illustrated in Figure 47.
FRAMEA
A[15:0]
DAC1
DAC2
DAC3
DAC4
DAC1
DAC2
DAC3
DAC4
DCIA
08910-
047
Figure 47. Timing Diagram for Single-Port Mode
Each data sample, by default, is expected to be formatted as an MSB
sent to Bit 15 and an LSB sent to Bit 0. When the bus swap bit is
set (Register 0x03[4]), the MSB should be sent to Bit 0, and the
LSB should be sent to Bit 15 for each port.
The FRAME signal is sampled with the same internal signal as
the data and has the same set-up and hold timing relative to DCI. If
desired, only the first FRAME pulse needs to be generated. This
initializes the internal clock phases inside the device, and data
latches just as if the periodic FRAME signal were sent.
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參數(shù)描述 |
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| AD9148BBPZ | 功能描述:IC DAC 16BIT SPI/SRL 196BGA RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:TxDAC+® 標(biāo)準(zhǔn)包裝:1 系列:- 設(shè)置時(shí)間:4.5µs 位數(shù):12 數(shù)據(jù)接口:串行，SPI? 轉(zhuǎn)換器數(shù)目:1 電壓電源:單電源 功率耗散（最大）:- 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:8-SOIC（0.154"，3.90mm 寬） 供應(yīng)商設(shè)備封裝:8-SOICN 包裝:剪切帶 (CT) 輸出數(shù)目和類型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:* 其它名稱:MCP4921T-E/SNCTMCP4921T-E/SNRCTMCP4921T-E/SNRCT-ND |
| AD9148BBPZRL | 功能描述:IC DAC 16BIT SPI/SRL 196BGA RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:TxDAC+® 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1,000 系列:- 設(shè)置時(shí)間:1µs 位數(shù):8 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:8 電壓電源:雙 ± 功率耗散（最大）:941mW 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:24-SOIC W 包裝:帶卷 (TR) 輸出數(shù)目和類型:8 電壓，單極 采樣率（每秒）:* |
| AD9148BPCZ | 制造商:AD 制造商全稱:Analog Devices 功能描述:Quad 16-Bit,1 GSPS, TxDAC+ Digital-to-Analog Converter |
| AD9148BPCZRL | 制造商:AD 制造商全稱:Analog Devices 功能描述:Quad 16-Bit,1 GSPS, TxDAC+ Digital-to-Analog Converter |
| AD9148-EBZ | 功能描述:BOARD EVALUATION FOR AD9148 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估板 - 數(shù)模轉(zhuǎn)換器 (DAC) 系列:TxDAC+® 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- DAC 的數(shù)量:4 位數(shù):12 采樣率（每秒）:- 數(shù)據(jù)接口:串行，SPI? 設(shè)置時(shí)間:3µs DAC 型:電流/電壓 工作溫度:-40°C ~ 85°C 已供物品:板 已用 IC / 零件:MAX5581 |
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