參數(shù)資料
型號: AD9148BBPZRL
廠商: Analog Devices Inc
文件頁數(shù): 59/72頁
文件大小: 0K
描述: IC DAC 16BIT SPI/SRL 196BGA
標(biāo)準(zhǔn)包裝: 1,500
系列: TxDAC+®
設(shè)置時(shí)間: 20ns
位數(shù): 16
數(shù)據(jù)接口: 串行,SPI?
轉(zhuǎn)換器數(shù)目: 4
電壓電源: 單電源
功率耗散(最大): 2.67W
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 196-LFBGA 裸露焊盤
供應(yīng)商設(shè)備封裝: 196-BGA
包裝: 帶卷 (TR)
輸出數(shù)目和類型: 4 電流,單極
采樣率(每秒): 1G
AD9148
Data Sheet
Rev. B | Page 62 of 72
Reducing LO Leakage and Unwanted Sidebands
Analog Devices modulators can introduce unwanted signals at
the LO frequency due to dc offset voltages in the I and Q baseband
inputs as well as feedthrough paths from the LO input to the
output. The LO feedthrough can be nulled by applying the correct
dc offset voltages at the DAC output. This can be done either
by using the auxiliary DACs (Register 0x32, Register 0x33,
Register 0x36, and Register 0x37) or by using the digital dc
offset adjustments (Register 0x2C to Register 0x2F). Using the
auxiliary DACs has the advantage that none of the main DAC
dynamic range is used for performing the dc offset adjustment.
The disadvantage is that the common-mode level of the output
signal changes as a function of the auxiliary DAC current. The
opposite is true when the digital offset adjustment is used.
Good sideband suppression requires both gain and phase matching
of the I and Q signals. The phase adjust (Register 0x28 to
Register 0x2B) and gain control (Register 0x50 and Register 0x51)
registers can be used to calibrate I and Q transmit paths to optimize
the sideband suppression. As an alternative to the digital gain
scaling, the DAC full-scale output current (Register 0x30,
Register 0x31, Register 0x34, and Register 0x35) can also be
adjusted to calibrate the I and Q transmit paths; however, changing
the DAC full-scale output current affects the common-mode
voltage level.
For more information on correcting imperfections in IQ
modulators to improve RF signal fidelity, refer to the AN-1039
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