參數(shù)資料
型號: AD9510BCPZ-REEL7
廠商: Analog Devices Inc
文件頁數(shù): 37/56頁
文件大小: 0K
描述: IC CLOCK DIST 8OUT PLL 64LFCSP
標準包裝: 750
類型: 扇出緩沖器(分配),除法器
PLL:
輸入: 時鐘
輸出: CMOS,LVDS,LVPECL
電路數(shù): 1
比率 - 輸入:輸出: 2:8
差分 - 輸入:輸出: 是/是
頻率 - 最大: 1.2GHz
除法器/乘法器: 是/無
電源電壓: 3.135 V ~ 3.465 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 64-VFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 64-LFCSP-VQ(9x9)
包裝: 帶卷 (TR)
配用: AD9510-VCO/PCBZ-ND - BOARD EVALUATION FOR AD9510
AD9510/PCBZ-ND - BOARD EVALUATION FOR AD9510
AD9510
Data Sheet
Rev. B | Page 42 of 56
Table 22. Serial Control Port, 16-Bit Instruction Word, MSB First
MSB
LSB
I15
I14
I13
I12
I11
I10
I9
I8
I7
I6
I5
I4
I3
I2
I1
I0
R/W
W1
W0
A12 = 0
A11 = 0
A10 = 0
A9 = 0
A8 = 0
A7 = 0
A6
A5
A4
A3
A2
A1
A0
Figure 46. Serial Control Port Write—MSB First, 16-Bit Instruction, 2 Bytes Data
Figure 47. Serial Control Port Read—MSB First, 16-Bit Instruction, 4 Bytes Data
Figure 48. Serial Control Port WriteMSB First, 16-Bit Instruction, Timing Measurements
Figure 49. Timing Diagram for Serial Control Port Register Read
Figure 50. Serial Control Port Write—LSB First, 16-Bit Instruction, 2 Bytes Data
05046-019
CSB
SCLK DON'T CARE
SDIO
A12
W0
W1
R/W
A11 A10 A9
A8
A7
A6 A5
A4
A3 A2
A1
A0
D7 D6
D5
D4
D3
D2 D1
D0
D7
D6 D5
D4
D3 D2
D1
D0
DON'T CARE
16-BIT INSTRUCTION HEADER
REGISTER (N) DATA
REGISTER (N – 1) DATA
05046-020
CSB
SCLK
SDIO
SDO
REGISTER (N) DATA
16-BIT INSTRUCTION HEADER
REGISTER (N – 1) DATA
REGISTER (N – 2) DATA
REGISTER (N – 3) DATA
A12
W0
W1
R/W
A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
DON'T CARE
DON'T
CARE
D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0
05046-021
tS
DON'T CARE
W1
W0
A12
A11
A10
A9
A8
A7
A6
A5
D4
D3
D2
D1
D0
DON'T CARE
R/W
tDS
tDH
tHI
tLO
tCLK
tH
CSB
SCLK
SDIO
05046-022
DATA BIT N– 1
DATA BIT N
CSB
SCLK
SDIO
SDO
tDV
05046-023
CSB
SCLK DON'T CARE
DON'T CARE
16-BIT INSTRUCTION HEADER
REGISTER (N) DATA
REGISTER (N + 1) DATA
SDIO
DON'T CARE
A0 A1
A2
A3
A4
A5 A6
A7
A8
A9 A10 A11 A12
D1
D0
R/W
W1
W0
D2
D3
D4
D5 D6
D7
D0
D1
D2
D3
D4
D5
D6
D7
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