參數(shù)資料
型號: AD9613-170EBZ
廠商: Analog Devices Inc
文件頁數(shù): 33/36頁
文件大?。?/td> 0K
描述: BOARD EVAL FOR AD9613-170
標準包裝: 1
ADC 的數(shù)量: 2
位數(shù): 12
采樣率(每秒): 170M
數(shù)據(jù)接口: 串行,SPI?
輸入范圍: 1.75 Vpp
在以下條件下的電源(標準): 670mW @ 170MSPS
工作溫度: -40°C ~ 85°C
已用 IC / 零件: AD9613
已供物品:
AD9613
Data Sheet
Rev. C | Page 6 of 36
DIGITAL SPECIFICATIONS
AVDD = 1.8 V, DRVDD = 1.8 V, maximum sample rate, VIN = 1.0 dBFS differential input, 1.75 V p-p full-scale input range, DCS enabled,
unless otherwise noted.
Table 3.
Parameter
Temp
Min
Typ
Max
Unit
DIFFERENTIAL CLOCK INPUTS (CLK+, CLK)
Logic Compliance
CMOS/LVDS/LVPECL
Internal Common-Mode Bias
Full
0.9
V
Differential Input Voltage
Full
0.3
3.6
V p-p
Input Voltage Range
Full
AGND
AVDD
V
Input Common-Mode Range
Full
0.9
1.4
V
High Level Input Current
Full
10
22
A
Low Level Input Current
Full
22
10
A
Input Capacitance
Full
4
pF
Input Resistance
Full
8
10
12
k
SYNC INPUT
Logic Compliance
CMOS/LVDS
Internal Bias
Full
0.9
V
Input Voltage Range
Full
AGND
AVDD
V
High Level Input Voltage
Full
1.2
AVDD
V
Low Level Input Voltage
Full
AGND
0.6
V
High Level Input Current
Full
5
+5
A
Low Level Input Current
Full
5
+5
A
Input Capacitance
Full
1
pF
Input Resistance
Full
12
16
20
k
LOGIC INPUT (CSB)1
High Level Input Voltage
Full
1.22
2.1
V
Low Level Input Voltage
Full
0
0.6
V
High Level Input Current
Full
5
+5
A
Low Level Input Current
Full
80
+45
A
Input Resistance
Full
26
k
Input Capacitance
Full
2
pF
LOGIC INPUT (SCLK)2
High Level Input Voltage
Full
1.22
2.1
V
Low Level Input Voltage
Full
0
0.6
V
High Level Input Current
Full
45
70
A
Low Level Input Current
Full
5
+5
A
Input Resistance
Full
26
k
Input Capacitance
Full
2
pF
LOGIC INPUTS (SDIO)2
High Level Input Voltage
Full
1.22
2.1
V
Low Level Input Voltage
Full
0
0.6
V
High Level Input Current
Full
45
70
A
Low Level Input Current
Full
5
+5
A
Input Resistance
Full
26
k
Input Capacitance
Full
5
pF
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