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參數(shù)資料
| 型號： | AD9707BCPZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 22/44頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC TX 14BIT 175MSPS 32-LFCSP |
| 產(chǎn)品培訓(xùn)模塊： | Data Converter Fundamentals DAC Architectures |
| 標準包裝： | 1 |
| 系列： | TxDAC® |
| 設(shè)置時間： | 11ns |
| 位數(shù)： | 14 |
| 數(shù)據(jù)接口： | 串行 |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 電壓電源： | 模擬和數(shù)字 |
| 功率耗散（最大）： | 50mW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-VFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 32-LFCSP-VQ（5x5） |
| 包裝： | 托盤 |
| 輸出數(shù)目和類型： | 2 電流，單極 |
| 采樣率（每秒）： | 175M |
| 產(chǎn)品目錄頁面： | 785 (CN2011-ZH PDF) |
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Data Sheet
AD9704/AD9705/AD9706/AD9707
Rev. B | Page 29 of 44
TERMINOLOGY
Linearity Error (Integral Nonlinearity or INL)
INL is defined as the maximum deviation of the actual analog
output from the ideal output, determined by a straight line
drawn from zero to full scale.
Differential Nonlinearity (DNL)
DNL is the measure of the variation in analog value, normalized
to full scale, associated with a 1 LSB change in digital input code.
Monotonicity
A digital-to-analog converter is monotonic if the output either
increases or remains constant as the digital input increases.
Offset Error
Offset error is the deviation of the output current from the ideal of
zero. For IOUTA, 0 mA output is expected when the inputs are all
0s. For IOUTB, 0 mA output is expected when all inputs are set to 1.
Gain Error
Gain error is the difference between the actual and ideal output
span. The actual span is determined by the output when all inputs
are set to 1, minus the output when all inputs are set to 0. The
ideal gain is calculated using the measured VREF. Therefore,
the gain error does not include effects of the reference.
Output Compliance Range
Output compliance range is the range of allowable voltage at the
output of a current output DAC. Operation beyond the maximum
compliance limits can cause either output stage saturation or
breakdown, resulting in nonlinear performance.
Temperature Drift
Temperature drift is specified as the maximum change from the
ambient (25°C) value to the value at either TMIN or TMAX. For
offset and gain drift, the drift is reported in ppm of full-scale
range (FSR) per °C. For reference drift, the drift is reported in
ppm per °C.
Power Supply Rejection
Power supply rejection is the maximum change in the full-scale
output as the supplies are varied from nominal to minimum
and maximum specified voltages.
Settling Time
Settling time is the time required for the output to reach and
remain within a specified error band about its final value,
measured from the start of the output transition.
Glitch Impulse
Asymmetrical switching times in a DAC give rise to undesired
output transients that are quantified by a glitch impulse. It is
specified as the net area of the glitch in picovolt-seconds (pV-s).
Spurious-Free Dynamic Range (SFDR)
SFDR is the difference, in decibels (dB), between the rms
amplitude of the output signal and the peak spurious signal
over the specified bandwidth.
Total Harmonic Distortion (THD)
THD is the ratio of the rms sum of the first six harmonic
components to the rms value of the measured input signal.
It is expressed as a percentage or in decibels (dB).
Multitone Power Ratio
Multitone power ratio is the spurious-free dynamic range
containing multiple carrier tones of equal amplitude. It is
measured as the difference between the rms amplitude of
a carrier tone to the peak spurious signal in the region of
a removed tone.
Noise Spectral Density (NSD)
Noise spectral density is the average noise power normalized to
a 1 Hz bandwidth, with the DAC converting and producing an
output tone.
0.1F
DIGITAL DATA
SOURCE DPG
DIGITAL
DATA
LATCHES
CURRENT
SOURCE
ARRAY
SLEEP/CSB
SPI
IOUTB
IOUTA
OTCM
REFIO
FS ADJ
CLKVDD
CLKCOM
CLOCK
OUTPUT
CLK–
CLK+
ACOM
AVDD
DVDD
DCOM
1.0V REF
1.7V TO 3.6V
AD9707
50
JTX-4-10T+
ADT4-6T+
1k
LSB
SWITCHES
SEGMENTED
SWITCHES
RSET
16k
1.7V TO 3.6V
AD9512
CLK1
CLKB
1.7V TO 3.6V
LOW JITTER
RF SOURCE
05
92
6-
20
0
Figure 70. Basic AC Characterization Test Setup
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9707BCPZRL7 | 功能描述:IC DAC TX 14BIT 175MSPS 32-LFCSP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:TxDAC® 標準包裝:47 系列:- 設(shè)置時間:2µs 位數(shù):14 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 電壓電源:單電源 功率耗散（最大）:55µW 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:28-SSOP（0.209"，5.30mm 寬） 供應(yīng)商設(shè)備封裝:28-SSOP 包裝:管件 輸出數(shù)目和類型:1 電流，單極；1 電流，雙極 采樣率（每秒）:* |
| AD9707-DPG2-EBZ | 功能描述:BOARD EVAL FOR AD9707 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估板 - 數(shù)模轉(zhuǎn)換器 (DAC) 系列:* 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:1 系列:- DAC 的數(shù)量:4 位數(shù):12 采樣率（每秒）:- 數(shù)據(jù)接口:串行，SPI? 設(shè)置時間:3µs DAC 型:電流/電壓 工作溫度:-40°C ~ 85°C 已供物品:板 已用 IC / 零件:MAX5581 |
| AD9707-EB | 制造商:AD 制造商全稱:Analog Devices 功能描述:8-/10-/12-/14-Bit, 175 MSPS TxDAC D/A Converters |
| AD9707-EBZ | 制造商:Analog Devices 功能描述:Evaluation Board For AD9707 DigitalToAnalog Converters 8/10/12/14Bit, 175 MSPS TxDAC |
| AD9708 | 制造商:AD 制造商全稱:Analog Devices 功能描述:8-Bit, 100 MSPS TxDAC D/A Converter |
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