TMIN
參數(shù)資料
型號(hào): AD9707BCPZ
廠商: Analog Devices Inc
文件頁(yè)數(shù): 40/44頁(yè)
文件大?。?/td> 0K
描述: IC DAC TX 14BIT 175MSPS 32-LFCSP
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
標(biāo)準(zhǔn)包裝: 1
系列: TxDAC®
設(shè)置時(shí)間: 11ns
位數(shù): 14
數(shù)據(jù)接口: 串行
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 模擬和數(shù)字
功率耗散(最大): 50mW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 32-VFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 32-LFCSP-VQ(5x5)
包裝: 托盤
輸出數(shù)目和類型: 2 電流,單極
采樣率(每秒): 175M
產(chǎn)品目錄頁(yè)面: 785 (CN2011-ZH PDF)
Data Sheet
AD9704/AD9705/AD9706/AD9707
Rev. B | Page 5 of 44
SPECIFICATIONS
DC SPECIFICATIONS (3.3 V)
TMIN to TMAX, AVDD = 3.3 V, DVDD = 3.3 V, CLKVDD = 3.3 V, IOUTFS = 2 mA, unless otherwise noted.
Table 1.
AD9707
AD9706
AD9705
AD9704
Parameter
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
RESOLUTION
14
12
10
8
Bits
DC ACCURACY1
Integral Nonlinearity (INL)
Precalibration
±1.4
±6.0
±0.41
±1.48
±0.10
±0.36
±0.03
±0.09
LSB
Integral Nonlinearity (INL)
Postcalibration
±0.9
±0.30
±0.10
LSB
Differential Nonlinearity
(DNL) Precalibration
±1.2
±4.4
±0.35
±1.17
±0.09
±0.31
±0.02
±0.08
LSB
Differential Nonlinearity
(DNL) Postcalibration
±0.4
±0.13
±0.03
LSB
ANALOG OUTPUT
Offset Error
0.03
0
+0.03
0.03
0
+0.03
0.03
0
+0.03
0.03
0
+0.03
% of FSR
Gain Error (With External
Reference)
2.7
0.1
+2.7
2.7
0.1
+2.7
2.7
0.1
+2.7
2.7
0.1
+2.7
% of FSR
Gain Error (With Internal
Reference)
2.7
0.1
+2.7
2.7
0.1
+2.7
2.7
0.1
+2.7
2.7
0.1
+2.7
% of FSR
Full-Scale Output Current2
1
2
5
1
2
5
1
2
5
1
2
5
mA
Output Compliance Range
(From OTCM to
IOUTA/IOUTB)
0.8
+0.8
0.8
+0.8
0.8
+0.8
0.8
+0.8
V
Output Resistance
200
Output Capacitance
5
pF
REFERENCE OUTPUT
Reference Voltage
0.98
1.025
1.08
0.98
1.025
1.08
0.98
1.025
1.08
0.98
1.025
1.08
V
Reference Output Current3
100
nA
REFERENCE INPUT
Input Compliance Range
0.1
1.25
0.1
1.25
0.1
1.25
0.1
1.25
V
Reference Input Resistance
(Reference Powered Up)
10
Reference Input Resistance
(Reference Powered Down)
1
TEMPERATURE COEFFICIENTS
Offset Drift
0
ppm of
FSR/°C
Gain Drift (Without Internal
Reference)
±29
ppm of
FSR/°C
Gain Drift (With Internal
Reference)
±40
ppm of
FSR/°C
Reference Voltage Drift
±25
ppm/°C
POWER SUPPLY
Supply Voltage
AVDD
3.3
3.6
3.3
3.6
3.3
3.6
3.3
3.6
V
DVDD
3.3
3.6
3.3
3.6
3.3
3.6
3.3
3.6
V
CLKVDD
3.3
3.6
3.3
3.6
3.3
3.6
3.3
3.6
V
Analog Supply Current (IAVDD)
5.2
6.7
5.2
6.7
5.1
6.7
5.1
6.7
mA
Digital Supply Current (IDVDD)4
5.9
6.6
5.4
6.6
5.0
6.6
4.6
6.6
mA
Clock Supply Current (ICLKVDD)4
4.1
4.7
4.1
4.7
4.1
4.7
4.1
4.7
mA
Power Dissipation4
50.2
57
48.5
57
46.9
57
45.5
57
mW
Supply Current Sleep Mode
(IAVDD)
0.37
0.4
0.37
0.4
0.37
0.4
0.37
0.4
mA
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