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參數(shù)資料
| 型號： | AD9716BCPZRL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 47/80頁 |
| 文件大小： | 0K |
| 描述： | IC DAC DUAL 12BIT LO PWR 40LFCSP |
| 產(chǎn)品培訓模塊： | Data Converter Fundamentals DAC Architectures |
| 標準包裝： | 750 |
| 系列： | TxDAC® |
| 位數(shù)： | 12 |
| 數(shù)據(jù)接口： | 串行 |
| 轉換器數(shù)目： | 2 |
| 電壓電源： | 模擬和數(shù)字 |
| 功率耗散（最大）： | 86mW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 40-VFQFN 裸露焊盤，CSP |
| 供應商設備封裝： | 40-LFCSP-VQ（6x6） |
| 包裝： | 帶卷 (TR) |
| 輸出數(shù)目和類型： | 4 電流，單極 |
| 采樣率（每秒）： | 125M |
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AD9714/AD9715/AD9716/AD9717
Rev. A | Page 51 of 80
Note that LO feedthrough compensation is independent of
phase compensation. However, gain compensation can affect
the LO compensation because the gain compensation may
change the common-mode level of the signal. The dc offset of
some modulators is common-mode level dependent. Therefore,
it is recommended that the gain adjustment be performed prior
to LO compensation.
LO FEEDTHROUGH COMPENSATION
To achieve LO feedthrough compensation in a circuit, each
output of the two AUXDACs must be connected through a
100 kΩ resistor to one side of the differential DAC output. See
the Auxiliary DACS section for details of how to use AUXDACs.
The purpose of these connections is to drive a very small amount
of current into the nodes at the quadrature modulator inputs,
thereby adding a slight dc bias to one or the other of the
quadrature modulator signal inputs.
To achieve LO feedthrough compensation, the user should start
with the default conditions of the AUXDAC registers, and then
increment the magnitude of one or the other AUXDAC output
voltages. While this is being done, the amplitude of the LO
feedthrough at the quadrature modulator output should be
sensed. If the LO feedthrough amplitude increases, try either
decreasing the output voltage of the AUXDAC being adjusted,
or try adjusting the output voltage of the other AUXDAC. It
may take practice before an effective algorithm is achieved. The
AD9714/AD9715/AD9716/AD9717 evaluation board can be
used to adjust the LO feedthrough down to the noise floor,
although this is not stable over temperature.
RESULTS OF GAIN AND OFFSET CORRECTION
The results of gain and offset correction can be seen in Figure 110
and Figure 111. Figure 110 shows the output spectrum of the
quadrature demodulator before gain and offset correction.
Figure 111 shows the output spectrum after correction. The
LO feedthrough spur at 450 MHz has been suppressed to the
noise level. This result can be achieved by applying the correc-
tion, but the correction must be repeated after a large change in
temperature.
Note that gain matching improves the negative frequency image
rejection, but it is also related to the phase mismatch in the
quadrature modulator. It can be improved by adjusting the
relative phase between the two quadrature signals at the digital
side or properly designing the low-pass filter between the DACs
and quadrature modulators. Phase mismatch is frequency depen-
dent; therefore, routines must be developed to adjust it if
wideband signals are desired.
5
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–55
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–85
–95
0
–10
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447.5
449.0
450.0
451.0
452.5
07
26
5-
0
64
FREQUENCY (MHz)
(d
B
)
Figure 110. AD9714/AD9715/AD9716/AD9717 and ADL5370 with a Single-
Tone Signal at 450 MHz, No Gain or LO Compensation
5
–5
–15
–25
–35
–45
–55
–65
–75
–85
–95
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
447.5
449.0
450.0
451.0
452.5
07
26
5-
0
65
FREQUENCY (MHz)
(dB
)
Figure 111. AD9714/AD9715/AD9716/AD9717 and ADL5370 with a Single-
Tone Signal at 450 MHz, Gain and LO Compensation Optimized
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| AD9717BCPZ | 功能描述:IC DAC DUAL 14BIT LO PWR 40LFCSP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉換器 系列:TxDAC® 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:50 系列:- 設置時間:4µs 位數(shù):12 數(shù)據(jù)接口:串行 轉換器數(shù)目:2 電壓電源:單電源 功率耗散（最大）:- 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:8-TSSOP，8-MSOP（0.118"，3.00mm 寬） 供應商設備封裝:8-uMAX 包裝:管件 輸出數(shù)目和類型:2 電壓，單極 采樣率（每秒）:* 產(chǎn)品目錄頁面:1398 (CN2011-ZH PDF) |
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