- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄8579 > AD9735BBCZRL (Analog Devices Inc)IC DAC 12BIT 1.2GSPS 160-CSPBGA PDF資料下載
參數(shù)資料
| 型號： | AD9735BBCZRL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 25/72頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 12BIT 1.2GSPS 160-CSPBGA |
| 產(chǎn)品培訓(xùn)模塊： | Data Converter Fundamentals DAC Architectures |
| 標(biāo)準(zhǔn)包裝： | 1,500 |
| 位數(shù)： | 12 |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 電壓電源： | 模擬和數(shù)字 |
| 功率耗散（最大）： | 550mW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 160-LFBGA，CSPBGA |
| 供應(yīng)商設(shè)備封裝： | 160-CSPBGA（12x12） |
| 包裝： | 帶卷 (TR) |
| 輸出數(shù)目和類型： | 2 電流，單極 |
| 采樣率（每秒）： | 1.2G |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁當(dāng)前第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁
AD9734/AD9735/AD9736
Rev. A | Page 31 of 72
FULL SCALE CURRENT (FSC) REGISTERS (REG. 2, REG. 3)
ADDR
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0x02
FSC_1
SLEEP
–
FSC<9>
FSC<8>
0x03
FSC_2
FSC<7>
FSC<6>
FSC<5>
FSC<4>
FSC<3>
FSC<2>
FSC<1>
FSC<0>
Table 12. Full Scale Current Output Register Bit Descriptions
Bit Name
Read/Write
Description
SLEEP
WRITE
0, enable DAC output.
1, set DAC output current to 0 mA.
FSC<9:0>
WRITE
0x000, 10 mA full-scale output current.
0x200, 20 mA full-scale output current.
0x3FF, 30 mA full-scale output current.
LVDS CONTROLLER (LVDS_CNT) REGISTERS (REG. 4, REG. 5, REG. 6)
ADDR
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0x04
LVDS_CNT1
MSD<3>
MSD<2>
MSD<1>
MSD<0>
MHD<3>
MHD<2>
MHD<1>
MHD<0>
0x05
LVDS_CNT2
SD<3>
SD<2>
SD<1>
SD<0>
LCHANGE
ERR_HI
ERR_LO
CHECK
0x06
LVDS_CNT3
LSURV
LAUTO
LFLT<3>
LFLT<2>
LFLT<1>
LFLT<0>
LTRH<1>
LTRH<0>
Table 13. LVDS Controller Register Bit Descriptions
Bit Name
Read/Write
Description
MSD<3:0>
WRITE
0x0, set setup delay for the measurement system.
READ
If ( LAUTO = 1), the latest measured value for the setup delay.
If ( LAUTO = 0), readback of the last SPI write to this bit.
MHD<3:0>
WRITE
0x0, set hold delay for the measurement system.
READ
If ( LAUTO = 1), the latest measured value for the hold delay.
If ( LAUTO = 0), readback of the last SPI write to this bit.
SD<3:0>
WRITE
0x0, set sample delay.
READ
If ( LAUTO = 1), the result of a measurement cycle is stored in this register.
If ( LAUTO = 0), readback of the last SPI write to this bit.
LCHANGE
READ
0, no change from previous measurement.
1, change in value from the previous measurement.
NOTE: The average filter and the threshold detection are not applied to this bit.
ERR_HI
READ
One of the 15 LVDS inputs is above the input voltage limits of the IEEE reduced link specification.
ERR_LO
READ
One of the 15 LVDS inputs is below the input voltage limits of the IEEE reduced link specification.
CHECK
READ
0, phase measurement—sampling in the previous or following DATA cycle.
1, phase measurement—sampling in the correct DATA cycle.
LSURV
WRITE
0, the controller stops after completion of the current measurement cycle.
1, continuous measurements are taken and an interrupt is issued if the clock alignment drifts beyond the
threshold value.
LAUTO
WRITE
0, sample delay is not automatically updated.
1, continuously starts measurement cycles and updates the sample delay according to the measurement.
NOTE: LSURV (Reg. 6, Bit 7) must be set to 1 and the LVDS IRQ (Reg. 1, Bit 3) must be set to 0 for AUTO mode.
LFLT<3:0>
WRITE
0x0, average filter length, Delay = Delay + Delta Delay/2^ LFLT <3:0>, values greater than 12 (0x0C) are
clipped to 12.
LTRH<2:0>
WRITE
000, set auto update threshold values.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| VE-264-MY-B1 | CONVERTER MOD DC/DC 48V 50W |
| AD9776BSVZRL | IC DAC 12BIT DUAL 1GSPS 100TQFP |
| NCS2553DR2G | IC TRPL VIDEO AMP W/FILTER 8SOIC |
| VE-261-MY-B1 | CONVERTER MOD DC/DC 12V 50W |
| VE-260-MY-B1 | CONVERTER MOD DC/DC 5V 50W |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9735BBCZRL1 | 制造商:AD 制造商全稱:Analog Devices 功能描述:10-/12-/14-Bit, 1200 MSPS DACS |
| AD9735-DPG2-EBZ | 功能描述:BOARD EVAL FOR AD9735 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估板 - 數(shù)模轉(zhuǎn)換器 (DAC) 系列:* 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- DAC 的數(shù)量:4 位數(shù):12 采樣率（每秒）:- 數(shù)據(jù)接口:串行，SPI? 設(shè)置時間:3µs DAC 型:電流/電壓 工作溫度:-40°C ~ 85°C 已供物品:板 已用 IC / 零件:MAX5581 |
| AD9735-EB | 制造商:Analog Devices 功能描述: |
| AD9735-EBZ | 制造商:Analog Devices 功能描述:Evaluation Board For AD9735 DAC, 10-/12-/14-Bit, 1200 MSPS DACs 制造商:Analog Devices 功能描述:EVAL BD FOR AD9735 DAC, 10-/12-/14BIT, 1200 MSPS DACS - Bulk |
| AD9736 | 制造商:Analog Devices 功能描述:14-BIT, 1.2 GSPS TXDAC+? D/A CONVERTER - Bulk |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。