參數(shù)資料
型號(hào): ADATE302-02BSVZ
廠商: Analog Devices Inc
文件頁(yè)數(shù): 35/58頁(yè)
文件大小: 0K
描述: IC DCL ATE 500MHZ DUAL 100TQFP
標(biāo)準(zhǔn)包裝: 1
類(lèi)型: DCL
應(yīng)用: 自動(dòng)測(cè)試設(shè)備
安裝類(lèi)型: 表面貼裝
封裝/外殼: 100-TQFP 裸露焊盤(pán)
供應(yīng)商設(shè)備封裝: 100-TQFP-EP(14x14)
包裝: 托盤(pán)
ADATE302-02
Rev. A | Page 40 of 58
DEFINITION OF SPI WORD
The SPI can take variable length words, depending on the operation. At most, the word is 24 bits longs: 16 bits of data, two channel
selects, one R/W selector, and a 5-bit address.
Depending on the operation, the data can be smaller (or nonexistent in the case of a read operation).
Example 1
Write 16 bits of data to a register or DAC; unused MSBs are ignored. For example, Bit 15 and Bit 14 are ignored, and Bit 13 through Bit 0
are applied to the 14-bit DAC.
07
278
-004
DATA[15:0]
CH[1:0]
R/W
ADDR[4:0]
Figure 77.
Example 2
Write 14 bits of data to the DAC.
072
78-
00
5
DATA[13:0]
CH[1:0]
R/W
ADDR[4:0]
Figure 78.
Example 3a
Write two bits of data to the 2-bit register.
07
27
8-
00
6
DATA[1:0]
CH[1:0]
R/W
ADDR[4:0]
Figure 79.
Example 3b
Write two bits of data to the 2-bit register. Bit 15 through Bit 2 are ignored, while Bit 1 through Bit 0 are applied to the register.
072
78
-0
07
DATA[15:0]
CH[1:0]
R/W
ADDR[4:0]
Figure 80.
Example 4
Read request and follow with a 2nd instruction (could be NOP) to clock out the data.
07
278
-00
8
DATA[15:0]
CH[1:0]
R/W
ADDR[4:0]
CH[1:0]
R/W = 0
ADDR[4:0]
Figure 81.
Table 19. Channel Selection
Channel 1
Channel 0
Channel Selected
0
NOP (no channel selected, no register
changes)
0
1
Channel 0 selected
1
0
Channel 1 selected
1
Channel 0 and Channel 1 selected
Table 20. R/W Definition
R/W
Description
0
Current register specified by address is shifted out
of SDOUT on next shift operation
1
Current data is written to register specified by
address and channel select
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