參數(shù)資料
型號(hào): ADATE302-02BSVZ
廠商: Analog Devices Inc
文件頁數(shù): 46/58頁
文件大小: 0K
描述: IC DCL ATE 500MHZ DUAL 100TQFP
標(biāo)準(zhǔn)包裝: 1
類型: DCL
應(yīng)用: 自動(dòng)測試設(shè)備
安裝類型: 表面貼裝
封裝/外殼: 100-TQFP 裸露焊盤
供應(yīng)商設(shè)備封裝: 100-TQFP-EP(14x14)
包裝: 托盤
ADATE302-02
Rev. A | Page 50 of 58
RECOMMENDED PMU MODE SWITCHING SEQUENCES
To minimize any possible aberrations and voltage spikes on the DUT output, specific mode switching sequences are recommended for the
following transitions:
PMU disable to PMU enable
PMU force voltage mode to PMU force current mode
PMU force current mode to PMU force voltage mode.
PMU Disable to PMU Enable
Step 1: See Table 39 for state of registers in PMU disabled mode.
Table 39.
Register
Bit
Setting
PE/PMU Enable Register, ADDR[4:0] = 0x0C
Data[2]
0
PMU State Register, ADDR[4:0] = 0x0E
Data[9:8]
XX
Data[7]
X
Data[6]
X
Data[5]
X
Data[4]
X
Data[3]
X
Data[2:0]
XXX
Step 2: Write to Register ADDR[4:0] = 0x0E (see Table 40).
Table 40.
Register
Bit
Setting
Comments
PMU State Register, ADDR[4:0] = 0x0E
Data[9:8]
1X or 00
Set desired input selection
Data[7]
X
Data[6]
X
Data[5]
X
Data[4]
X
Data[3]
0
This bit must be set to force voltage mode to
reduce aberrations
Data[2:0]
XXX
Set desired range
Step 3: Write to Register ADDR[4:0] = 0x0C (see Table 41).
Table 41.
Register
Bit
Setting
Comments
PE/PMU Enable Register, ADDR[4:0] = 0x0C
Data[2]
1
PMU is now enabled in force voltage mode
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