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參數(shù)資料
| 型號： | ADE7763ARS |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 電源管理 |
| 英文描述： | Single-Phase Active and Apparent Energy Metering IC |
| 中文描述： | 2-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO20 |
| 封裝： | MO-150AE, SSOP-20 |
| 文件頁數(shù)： | 52/56頁 |
| 文件大小： | 1328K |
| 代理商： | ADE7763ARS |
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ADE7763
INTERRU
RESET IN
INTER
Rev. A | Page 52 of 56
P
T
R
TA
R
(0
EGI
,
RUP
STER (0
The status register is used by the MCU to
corresponding flag in the interrupt status
the IRQ
logic output will go active low. W
register to determine the source of the int
source of a
upt requ
T STATUS
ERRUPT S
T ENABLE EGI
EGISTER
TUS R
x0B),
STER (0x0C)
x0A)
determine the
gister is set to logic hig
re
the MCU services th
upt.
err
n interr
f the enable bi
h. I
terrupt, it mu
e in
est (IRQ). When an interrupt event occurs, the
g is Logic 1 in the interrupt enable register,
t for this fla
read from the interrupt status
st first carry out a
able 12.
Bit
Location
0
1
2
Interrupt
Flag
AEHF
SAG
CYCEND
Description
Indicates that an interrupt occurred because the active energy register, AENERGY, is more than half full.
Indicates that an interrupt was caused by a sag on the line voltage.
Indicates the end of energy accumulation over an integral number of half line cycles, as defined by the content
of the LINECYC register—see the Line Cycle Energy Accumulation Mode section.
Indicates that new data is present in the waveform register.
This status bit reflects the status of the ZX logic ouput—see the Zero-Crossing Detection section.
Indicates that a temperature conversion result is available in the temperature register.
Indicates the end of a reset for software and hardware resets. The corresponding enable bit has no function in
the interrupt enable register, i.e., this status bit is set at the end of a reset, but cannot be enabled to cause an
interrupt.
Indicates that the active energy register has overflowed.
Indicates that the waveform sample from Channel 2 has exceeded the VPKLVL value.
Indicates that the waveform sample from Channel 1 has exceeded the IPKLVL value.
Indicates that an interrupt occurred because the apparent energy register, VAENERGY, is more than half full.
Indicates that the apparent energy register has overflowed.
Indicates that an interrupt was caused by a missing zero crossing on the line voltage for a specified number of
line cycles—see the Zero-Crossing Timeout section.
Indicates that the power has gone from negative to positive.
Indicates that the power has gone from positive to negative.
Reserved.
hen
T
3
4
5
6
WSMP
ZX
TEMP
RESET
7
8
9
10
11
12
AEOF
PKV
PKI
VAEHF
VAEOF
ZXTO
13
14
15
PPOS
PNEG
RESERVED
VAEHF
(VAENERGY IS HALF FULL)
PPOS
(POWER NEGATIVE TO POSITIVE)
RESERVED
PNEG
(POWER POSITIVE TO NEGATIVE)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
8
9
7
4
5
6
2
3
0
1
15 14 13 12 11 10
AEHF
(ACTIVE ENERGY HALF FULL)
SAG
(SAG ONLINE VOLTAGE)
CYCEND
(END OF LINECYC HALF LINE CYCLES)
WSMP
(WAVEFORM SAMPLES DATA READY)
ZX
(ZERO CROSSING)
TEMP
(TEMPERATURE DATA READY)
RESET
(END OF SOFTWARE/HARDWARE RESET)
AEOF
(ACTIVE ENERGY REGISTER OVERFLOW)
ZXTO
(ZERO-CROSSING TIMEOUT)
VAEOF
(VAENERGY OVERFLOW)
PKI
(CHANNEL 1 SAMPLE ABOVE IPKLVL)
PKV
(CHANNEL 2 SAMPLE ABOVE VPKLVL)
0
ADDR: 0x0A, 0x0B, 0x0C
Figure 87. Interrupt Status/Interrupt Enable Register
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| ADE7763ARSRL | Single-Phase Active and Apparent Energy Metering IC |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADE7763ARSRL | 制造商:Analog Devices 功能描述:Energy Measurement 20-Pin SSOP T/R |
| ADE7763ARSZ | 功能描述:IC ENERGY METERING 1PHASE 20SSOP RoHS:是 類別:集成電路 (IC) >> PMIC - 能量測量 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:2,500 系列:* |
| ADE7763ARSZ | 制造商:Analog Devices 功能描述:IC, SINGLE PHASE ENERGY METER, SSOP-20 |
| ADE7763ARSZRL | 功能描述:IC ENERGY METERING 1PHASE 20SSOP RoHS:是 類別:集成電路 (IC) >> PMIC - 能量測量 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:2,500 系列:* |
| ADE7763ARSZRL | 制造商:Analog Devices 功能描述:IC, SINGLE PHASE ENERGY METER, SSOP-20 |
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