參數(shù)資料
型號(hào)： ADE7763ARSRL
廠商： ANALOG DEVICES INC
元件分類： 電源管理
英文描述： Single-Phase Active and Apparent Energy Metering IC
中文描述： 2-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO20
封裝： MO-150AE, SSOP-20
文件頁(yè)數(shù)： 33/56頁(yè)
文件大?。?/td> 1328K
代理商： ADE7763ARSRL
ADE7763
Integration Times under Steady Load
As mentioned in the last section, the discrete time sample
period (
T
) for the accumulation register is 1.1 μs (4/CLKIN).
With full-scale sinusoidal signals on the analog inputs and the
VAGAIN register set to 0x000, the average word value from the
apparent power stage is 0xA D055. The maximum value that
can be stored in the apparent energy register before it overflows
is 2
24
or 0xFF FFFF. The average word value is added to the
internal register, which can store 2
48
or 0xFFFF FFFF FFFF
before it overflows. Therefore, the integration time under these
conditions with VADIV = 0 is calculated as follows:
Rev. A | Page 33 of 56
min
52
.
12
888
2
×
0xAD055
FFFF
FFFF
0xFFFF
=
=
μ
=
s
s
Time
(28)
When
VADIV
is set to a value other than 0, the integration time
varies, as shown in Equation 29.
Time
=
Time
WDIV
= 0
×
VADIV
(29)
LINE APPARENT ENERGY ACCUMULATION
The ADE7763 is designed with a special apparent energy
accumulation mode, which simplifies the calibration process.
By using the on-chip zero-crossing detection, the ADE7763
accumulates the apparent power signal in the LVAENERGY
register for an integral number of half cycles, as shown in
Figure 68. The line apparent energy accumulation mode is
always active.
The number of half line cycles is specified in the LINECYC
register, which is an unsigned, 16-bit register. The ADE7763 can
accumulate apparent power for up to 65,535 combined half
cycles. Because the apparent power is integrated on the same
integral number of line cycles as the line active energy register,
these two values can be easily compared. The active and apparent
energies are calculated more accurately because of this precise
timing control. At the end of an energy calibration cycle, the
CYCEND flag in the interrupt status register is set. If the
CYCEND mask bit in the interrupt mask register is enabled, the
IRQ output also will go active low. Thus, the IRQ line can also
be used to signal the end of a calibration.
The line apparent energy accumulation uses the same signal path
as the apparent energy accumulation. The LSB size of these two
registers is equivalent.
VADIV[7:0]
LPF1
+
+
LVAENERGY[23:0]
LVAENERGY REGISTER IS
UPDATED EVERY LINECYC
ZERO CROSSINGS WITH THE
TOTAL APPARENT ENERGY
DURING THAT DURATION
APPARENT
POWER
FROM
CHANNEL 2
ADC
23
0
LINECYC[15:0]
48
0
0
%
ZERO-CROSSING
DETECTION
CALIBRATION
CONTROL
Figure 68. Apparent Energy Calibration
相關(guān)PDF資料
PDF描述
ADG804 0.5 ohm CMOS 1.65 V TO 3.6 V 4-Channel Multiplexer
ADG804YRM 0.5 ohm CMOS 1.65 V TO 3.6 V 4-Channel Multiplexer
ADG804YRM-REEL 0.5 ohm CMOS 1.65 V TO 3.6 V 4-Channel Multiplexer
ADG804YRM-REEL7 0.5 ohm CMOS 1.65 V TO 3.6 V 4-Channel Multiplexer
ADN2525 10.7 Gbps Active Back-Termination, Differential Laser Diode Driver
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ADE7763ARSZ 功能描述:IC ENERGY METERING 1PHASE 20SSOP RoHS:是 類別:集成電路 (IC) >> PMIC - 能量測(cè)量 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:*
ADE7763ARSZ 制造商:Analog Devices 功能描述:IC, SINGLE PHASE ENERGY METER, SSOP-20
ADE7763ARSZRL 功能描述:IC ENERGY METERING 1PHASE 20SSOP RoHS:是 類別:集成電路 (IC) >> PMIC - 能量測(cè)量 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:*
ADE7763ARSZRL 制造商:Analog Devices 功能描述:IC, SINGLE PHASE ENERGY METER, SSOP-20
ADE7768 制造商:AD 制造商全稱:Analog Devices 功能描述:Energy Metering IC with Integrated Oscillator and Positive Power Accumulation
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*