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參數(shù)資料
| 型號： | ADE7763ARSRL |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 電源管理 |
| 英文描述： | Single-Phase Active and Apparent Energy Metering IC |
| 中文描述： | 2-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO20 |
| 封裝： | MO-150AE, SSOP-20 |
| 文件頁數(shù)： | 48/56頁 |
| 文件大?。?/td> | 1328K |
| 代理商： | ADE7763ARSRL |
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ADE7763
Address
0x12
Rev. A | Page 48 of 56
R/W
R/W
No. Bits
12
Default
0x0
Type
1
S
Description
Power Gain Adjust. This is a 12-bit register. Calibrate the active power
calculation by writing to this register. The calibration range is ±50% of
ll-scale active power. The resolution of the gain adjust is
the nominal fu
0.0244%/LSB —see the Calibrating an Energy Meter section.
Active Energy Divider Register. The internal active energy register is
divided by the value of this register before being stored in the AENER
register.
CF Frequency Divider Numerator Register. Ad
on the CF pin by writing to this 12-bit read/write register—see the
Energy-to-Frequency Conversion section.
ency Divider Denominator Register. Adjust the output
CF Frequ
frequency on the CF pin by writing to this 12-bit read/write register—se
the Energy-to-Frequency Co
Channel 1 RMS Value (Current Channel).
Channel 2 RMS Value (Voltage Channel).
ction Register.
Channel 1 RMS Offset Corre
Channel 2 RMS Offset Correction Register.
Apparent Gain Register. Calibrate the apparent power calculation by
writing to this register. The calibration range is 50% of the nominal
scale real power. The resolut
ion of the gain adjust is 0.02444%/LSB.
Apparent Energy Divider Register. The internal apparent energy regist
is divided by the value of this register before being stored in the
VAENERGY register.
Line Cycle Energy Accumulation Mode
register is used during line cycle energy accumulation mode to s
number of half line cycles for energy accumulation—see the Line Cycle
Energy Accumulation Mode section.
Zero-Crossing Timeout. If no zero crossings are detected on Channel 2
within the time specified in this 12-bit register, the interrupt request lin
(IRQ) will be activated—see the Zero-Crossing Detection section.
Sag Line Cycle Register. This 8-bit register specifies the number of
consecutive line cycles below SAGLVL that is required on Channel 2
before th
section.
Sag Voltage Level. An 8-bit write to this register determines at what
signal level on Chan
pin becomes active. The signal must
remain low for the number of cycles specified in the SAGCYC register
before the SAG pin is activated—see the Line Voltage Sag Detection
section.
Channel 1 Peak Level Threshold (Current Channel). This register sets the
level of current peak detection. If the Channel 1 input exceeds this level,
the PKI flag in the status register is set.
Channel 2 Peak Level Threshold (Voltage Channel). This register sets the
level of voltage peak detection. If the Channel 2 input exceeds this level,
the PKV flag in the status register is set.
Channel 1 Peak Register. The maximum input value of the current
channel, since the last read of the register is stored in this register.
Same as Channel 1 peak register, except that the register contents are
reset to 0 after a read.
Channel 2 Peak Register. The maximum input value of the voltage
channel, since the last read of the register is stored in this register.
Same as Channel 2 peak register, except that the register contents ar
reset to 0 after a read.
Temperature Register. This is an 8-bit register that contains the result of
the latest temperature conversion—see the Temperature Measurement
section.
Name
WGAIN
0x13
WDIV
R/W
8
0x0
U
GY
0x14
CFNUM
R/W
12
0x3F
U
just the output frequency
0x15
CFDEN
R/W
12
0x3F
U
e
nversion section.
0x16
0x17
0x18
0x19
0x1A
IRMS
VRMS
IRMSOS
VRMSOS
VAGAIN
R
R
R/W
R/W
R/W
24
24
12
12
12
0x0
0x0
0x0
0x0
0x0
U
U
S
S
S
full-
0x1B
VADIV
R/W
er
8
0x0
U
0x1C
LINECYC
R/W
xFFFF
U
Line-Cycle Register. This 16-bit
et the
16
0
0x1D
ZXTOUT
R/W
12
0xFFF
U
e
0x1E
SAGCYC
R/W
8
0xFF
U
e SAG output is activated—see the Line Voltage Sag Detection
0x1F
SAGLVL
R/W
8
0x0
U
peak
nel 2 the SAG
0x20
IPKLVL
R/W
8
0xFF
U
0x21
VPKLVL
R/W
8
0xFF
U
0x22
IPEAK
R
24
0x0
U
0x23
RSTIPEAK
R
24
0x0
U
0x24
VPEAK
R
24
0x0
U
0x25
RSTVPEAK
R
24
0x0
U
e
0x26
TEMP
R
8
0x0
S
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|---|---|
| ADE7763ARSZ | 功能描述:IC ENERGY METERING 1PHASE 20SSOP RoHS:是 類別:集成電路 (IC) >> PMIC - 能量測量 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:* |
| ADE7763ARSZ | 制造商:Analog Devices 功能描述:IC, SINGLE PHASE ENERGY METER, SSOP-20 |
| ADE7763ARSZRL | 功能描述:IC ENERGY METERING 1PHASE 20SSOP RoHS:是 類別:集成電路 (IC) >> PMIC - 能量測量 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:* |
| ADE7763ARSZRL | 制造商:Analog Devices 功能描述:IC, SINGLE PHASE ENERGY METER, SSOP-20 |
| ADE7768 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Energy Metering IC with Integrated Oscillator and Positive Power Accumulation |
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