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參數(shù)資料
| 型號(hào)： | ADF4158CCPZ-RL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 20/36頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC FRACTION N FREQ SYNT 24LFCSP |
| 標(biāo)準(zhǔn)包裝： | 1,500 |
| 類型： | 分?jǐn)?shù) N 合成器（RF） |
| PLL： | 是 |
| 輸入： | CMOS，TTL |
| 輸出： | 時(shí)鐘 |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 2:1 |
| 差分 - 輸入:輸出： | 是/無 |
| 頻率 - 最大： | 6.1GHz |
| 除法器/乘法器： | 是/是 |
| 電源電壓： | 2.7 V ~ 3.3 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-WFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 24-LFCSP-WQ（4x4） |
| 包裝： | 帶卷 (TR) |
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Data Sheet
ADF4158
Rev. G | Page 27 of 36
Waveform Deviations and Timing
Figure 35 shows a version of a burst or ramp. The key parameters
that define a burst or ramp are
Frequency deviation
Timeout interval
Number of steps
TIMER
fDEV
F
RE
Q
UE
NCY
TIME
08
72
8-
0
23
Figure 35. Waveform Timing
Frequency Deviation
The frequency deviation for each frequency hop is set by
fDEV = (fPFD/225) × (DEV × 2DEV_OFFSET)
(9)
where:
fPFD is the PFD frequency.
DEV is a 16-bit word.
DEV_OFFSET is a 4-bit word.
Timeout Interval
The time between each frequency hop is set by
Timer = CLK1 × CLK2 × (1/fPFD)
(10)
where:
CLK1 and CLK2 are 12-bit clock values (12-bit CLK1 divider in
R2, 12-bit clock divider in R4—CLK DIV set as RAMP DIV).
fPFD is the PFD frequency.
Number of Steps
A 20-bit step value defines the number of frequency hops that
take place. The INT value cannot be incremented by more than
28 = 256 from its starting value.
Single Ramp Burst
The most basic waveform is the single ramp burst. All other
waveforms are slight variations on this.
In the single ramp burst, the ADF4158 is locked to the fre-
quency defined in the FRAC/INT register. When the ramp
mode is enabled, the ADF4158 increments the N-divide value
by DEV × 2DEV_OFSET, causing a frequency shift, fDEV, on each
timer interval. This happens until the set number of steps has
taken place. The ADF4158 then retains the final N-divide value.
Single Sawtooth Burst
In the single sawtooth burst, the N-divide value is reset to its
initial value on the next timeout interval after the number of
steps has taken place. The ADF4158 retains this N-divide value.
Sawtooth Ramp
The sawtooth ramp is a repeated version of the single sawtooth
burst. The waveform repeats until the ramp is disabled.
Triangular Ramp
The triangular ramp is similar to the single ramp burst. However,
when the steps have been completed, the ADF4158 begins to
decrement the N-divide value by DEV × 2DEV_OFFSET on each
timeout interval. When the number of steps has again been
completed, it reverts to incrementing the N-divide value.
Repeating this creates a triangular waveform. The waveform
repeats until the ramp is disabled.
FMCW Radar Ramp Settings Worked Example
Take as an example, an FMCW radar system requiring the RF
LO to sawtooth ramp over a 50 MHz range every 2 ms. The
PFD frequency is 25 MHz, and the RF output range is 5800 MHz
to 5850 MHz.
The frequency deviation for each hop in the ramp is set to
~250 kHz.
The frequency resolution of ADF4158 is calculated as follows:
fRES = fPFD/225
(11)
Numerically:
fRES = 25 MHz/225 = 0.745 Hz
The DEV_OFFSET is calculated after rearranging Equation 9:
DEV_OFFSET = log2(fDEV/(fRES × DEVMAX))
(12)
Expressed in log10(x), Equation 10 can be transformed into the
following equation:
DEV_OFFSET = log10(fDEV/(fRES × DEVMAX))/log10(2)
(13)
where:
DEV_OFFSET = a 4-bit word.
fDEV = frequency deviation.
DEVMAX (Maximum of the Deviation Word) = 215
Using Equation 13, DEV_OFFSET is calculated as follows
DEV_OFFSET = log10(250 kHz/(0.745 Hz × 215))/log10(2) = 3.356
After rounding, DEV_OFFSET = 4.
From DEV_OFFSET, the resolution of frequency deviation can
be calculated as follows
fDEV_RES = fRES × 2DEV_OFFSET
(14)
fDEV_RES = 0.745 Hz × 24 = 11.92 Hz
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| ADF4158WCCPZ | 功能描述:IC FRAC-N FREQ SYNTH 24LFCSP 制造商:analog devices inc. 系列:- 包裝:托盤 零件狀態(tài):在售 類型:分?jǐn)?shù) N 合成器（RF） PLL:是 輸入:CMOS，TTL 輸出:時(shí)鐘 電路數(shù):1 比率 - 輸入:輸出:2:1 差分 - 輸入:輸出:是/無 頻率 - 最大值:6.1GHz 分頻器/倍頻器:是/是 電壓 - 電源:2.7 V ~ 3.3 V 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:24-WFQFN 裸露焊盤 供應(yīng)商器件封裝:24-LFCSP-WQ（4x4） 標(biāo)準(zhǔn)包裝:1 |
| ADF4158WCCPZ-RL7 | 功能描述:IC FRAC-N FREQ SYNTH 24LFCSP RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器，PLL，頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:Precision Edge® 類型:時(shí)鐘/頻率合成器 PLL:無 輸入:CML，PECL 輸出:CML 電路數(shù):1 比率 - 輸入:輸出:2:1 差分 - 輸入:輸出:是/是 頻率 - 最大:10.7GHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-VFQFN 裸露焊盤，16-MLF? 供應(yīng)商設(shè)備封裝:16-MLF?（3x3） 包裝:帶卷 (TR) 其它名稱:SY58052UMGTRSY58052UMGTR-ND |
| ADF4159 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Direct Modulation/Fast Waveform Generating, 13 GHz, Fractional-N Frequency Synthesizer |
| ADF4159CCPZ | 制造商:Analog Devices 功能描述:Fractional-N Frequency Synthesizer 24-Pin LFCSP EP Tray 制造商:Analog Devices 功能描述:DIRECT MODULATION/FAST WAVEFORM GENERATING, 13 GHZ, FRACTION - Trays 制造商:Analog Devices 功能描述:IC PLL FREQ SYNTHESIZER 24LFCSP 制造商:Analog Devices Inc. 功能描述:Phase Locked Loops - PLL |
| ADF4159CCPZ-RL7 | 制造商:Analog Devices 功能描述:Fractional-N Frequency Synthesizer 24-Pin LFCSP EP T/R 制造商:Analog Devices 功能描述:13GHZ FAST RAMP DIRECT MOD FRAC N PLL - Tape and Reel 制造商:Analog Devices Inc. 功能描述:Phase Locked Loops - PLL |
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