- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄9673 > ADN2817ACPZ (Analog Devices Inc)IC CLOCK/DATA RECOVERY 32-LFCSP PDF資料下載
參數(shù)資料
| 型號： | ADN2817ACPZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 24/40頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CLOCK/DATA RECOVERY 32-LFCSP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 類型： | 時(shí)鐘和數(shù)據(jù)恢復(fù)（CDR），多路復(fù)用器 |
| PLL： | 是 |
| 主要目的： | SONET/SDH |
| 輸入： | CML |
| 輸出： | CML |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 1:2 |
| 差分 - 輸入:輸出： | 是/是 |
| 頻率 - 最大： | 2.7GHz |
| 電源電壓： | 3 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-VFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 32-LFCSP-VQ（5x5） |
| 包裝： | 托盤 |
| 產(chǎn)品目錄頁面： | 788 (CN2011-ZH PDF) |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁當(dāng)前第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁
ADN2817/ADN2818
Data Sheet
Rev. E | Page 30 of 40
APPLICATIONS INFORMATION
PCB DESIGN GUIDELINES
Proper RF PCB design techniques must be used for optimal
performance.
Power Supply Connections and Ground Planes
For best practice, the use of one low impedance ground plane is
recommended. To reduce series inductance, solder the VEE pins
directly to the ground plane. If the ground plane is an internal
plane and connections to the ground plane are made through
vias, multiple vias can be used in parallel to reduce the series
inductance, especially on Pin 23, which is the ground return for
the output buffers. Connect the exposed pad to the ground
plane using plugged vias so that solder does not leak through
the vias during reflow.
Use of a 10 F electrolytic capacitor between VCC and VEE is
recommended at the location where the 3.3 V supply enters the
PCB. When using 0.1 F and 1 nF ceramic chip capacitors, they
should be placed between the IC power supply (VCC and VEE),
as close as possible to the ADN2817/ADN2818 VCC pins.
If connections to the supply and ground are made through
vias, the use of multiple vias in parallel helps to reduce series
inductance, especially on Pin 24, which supplies power to the
high speed CLKOUTP/CLKOUTN and DATAOUTP/DATAOUTN
output buffers. See the schematic in Figure 36 for recommended
connections.
By using adjacent power supply and ground planes, excellent
high frequency decoupling can be realized by using close
spacing between the planes. This capacitance is given by
CPLANE = 0.88εr A/d (pF)
where:
εr is the dielectric constant of the PCB material.
A is the area of the overlap of power and ground planes (cm2).
d is the separation between planes (mm).
For FR-4, εr = 4.4 and 0.25 mm spacing, C ≈ 15 pF/cm2.
VB
ER
32
V
CC
31
VEE
30
DAT
AO
UT
P
29
DAT
AO
UT
N
28
S
Q
UE
L
CH
27
CL
KO
UT
P
26
CL
KO
UT
N
25
T
HRADJ
RTH
9
RE
F
CL
KP
10
RE
F
CL
KN
11
V
CC
12
VEE
13
CF
2
14
CF
1
15
LOL
16
BERMODE
1
VCC
2
VREF
3
NIN
4
PIN
5
SLICEP
6
SLICEN
7
VEE
8
VCC
24
VEE
23
LOS
22
SDA
21
SCK
EXPOSED PAD
TIED OFF TO VEE
PLANE WITH VIAS.
20
SADDR5
19
VCC
18
VEE
17
ADN2817/
ADN2818
TOP VIEW
(Not to Scale)
1nF
0.1F
VCC
0.47F +20%
>300M
INSULATION RESISTANCE
C
I2C CONTROLLER
C
VCC
1nF
0.1F
1nF
0.1F
CIN
VCC
TIA
50
1nF
0.1F
DATAOUTP
DATAOUTN
CLKOUTP
CLKOUTN
50 TRANSMISSION
LINES
VCC
4 × 100
1nF
0.1F
+
VCC
10F
06001-
025
10k
10k
Figure 36. Typical ADN2817/ADN2818 Applications Circuit
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| V375C48M150B | CONVERTER MOD DC/DC 48V 150W |
| ADN2818ACPZ | IC CLOCK/DATA RECOVERY 32-LFCSP |
| XRT91L31IQ-F | IC TXRX SONET/SDH 8BIT 64QFP |
| MS27496E19A32S | CONN RCPT 32POS BOX MNT W/SCKT |
| AD9548BCPZ | IC CLOCK GEN/SYNCHRONIZR 88LFCSP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADN2817ACPZ-RL | 制造商:AD 制造商全稱:Analog Devices 功能描述:Continuous Rate 10 Mbps to 2.7 Gbps Clock and Data Recovery ICs |
| ADN2817ACPZ-RL7 | 功能描述:IC CLOCK/DATA RECOVERY 32-LFCSP RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 專用 系列:- 標(biāo)準(zhǔn)包裝:28 系列:- 類型:時(shí)鐘/頻率發(fā)生器 PLL:是 主要目的:Intel CPU 服務(wù)器 輸入:時(shí)鐘 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:3:22 差分 - 輸入:輸出:無/是 頻率 - 最大:400MHz 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:64-TFSOP （0.240"，6.10mm 寬） 供應(yīng)商設(shè)備封裝:64-TSSOP 包裝:管件 |
| ADN2817XCPX | 制造商:Analog Devices 功能描述:CONTINUOUS RATE 12.3MB/S TO 2.7GB/S CLOCK AND DATA RECOVERY - Trays |
| ADN2817XCPZ | 制造商:Analog Devices 功能描述:CONTINUOUS RATE 12.3MB/S TO 2.7GB/S CLOCK AND DATA RECOVERY - Gel-pak, waffle pack, wafer, diced wafer on film |
| ADN2818 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Continuous Rate 12.3Mb/s to 2.7Gb/s Clock and Data Recovery ICs |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。