參數(shù)資料
型號(hào): ADN2817ACPZ
廠商: Analog Devices Inc
文件頁數(shù): 37/40頁
文件大?。?/td> 0K
描述: IC CLOCK/DATA RECOVERY 32-LFCSP
標(biāo)準(zhǔn)包裝: 1
類型: 時(shí)鐘和數(shù)據(jù)恢復(fù)(CDR),多路復(fù)用器
PLL:
主要目的: SONET/SDH
輸入: CML
輸出: CML
電路數(shù): 1
比率 - 輸入:輸出: 1:2
差分 - 輸入:輸出: 是/是
頻率 - 最大: 2.7GHz
電源電壓: 3 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 32-VFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 32-LFCSP-VQ(5x5)
包裝: 托盤
產(chǎn)品目錄頁面: 788 (CN2011-ZH PDF)
ADN2817/ADN2818
Data Sheet
Rev. E | Page 6 of 40
OUTPUT AND TIMING SPECIFICATIONS
Table 3.
Parameter
Conditions
Min
Typ
Max
Unit
CML OUPUT CHARACTERISTICS (CLKOUTP/CLKOUTN,
DATAOUTP/DATAOUTN)
Single-Ended Output Swing, VSE
300
350
600
mV
Differential Output Swing, VDIFF
600
700
1200
mV
Output Voltage
High, VOH
VCC
V
Low, VOL
VCC 0.6
VCC 0.35
VCC 0.3
V
CML Outputs Timing
Rise Time
20% to 80%
80
112
ps
Fall Time
80% to 20%
80
123
ps
Setup Time, tS
150
200
250
ps
Hold Time, tH
150
200
250
ps
Setup Time, tDDRS
140
170
200
ps
Hold Time, tDDRH
200
230
260
ps
I2C INTERFACE DC CHARACTERISTICS
LVCMOS
Input Voltage
High, VIH
0.7 VCC
V
Low, VIL
0.3 VCC
V
Input Current
VIN = 0.1 VCC or VIN = 0.9 VCC
10.0
+10.0
A
Output Low Voltage
VOL, IOL = 3.0 mA
0.4
V
I2C INTERFACE TIMING
SCK Clock Frequency
400
kHz
SCK Pulse Width High
High, tHIGH
600
ns
Low, tLOW
1300
ns
Start Condition
Hold Time, tHD;STA
600
ns
Setup Time, tSU;STA
600
ns
Data
Setup Time, tSU;DAT
100
ns
Hold Time, tHD;DAT
300
ns
SCK/SDA Rise/Fall Time, tR/tF
20 + 0.1 Cb
300
ns
Stop Condition Setup Time, tSU;STO
600
ns
Bus Free Time Between a Stop and a Start, tBUF
1300
ns
REFCLK CHARACTERISTICS
Optional lock to REFCLK mode
Input Voltage Range
At REFCLKP or REFCLKN
VIL
0
V
VIH
VCC
V
Minimum Differential Input Drive
100
mV p-p
Reference Frequency
10
200
MHz
Required Accuracy
100
ppm
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