參數(shù)資料
型號： ADS1194CZXGT
廠商： TEXAS INSTRUMENTS INC
元件分類： 模擬信號調(diào)理
英文描述： SPECIALTY ANALOG CIRCUIT, PBGA64
封裝： 8 X 8 MM, GREEN, PLASTIC, NFBGA-64
文件頁數(shù)： 28/76頁
文件大?。?/td> 1193K
代理商： ADS1194CZXGT
START
DRDY
CS
SCLK
DIN
DOUT
ADS1198
(Device0)
START
DRDY
CS
SCLK
DIN
DOUT
ADS1194
(Device1)
START
(1)
a)StandardConfiguration
CLK
INT
GPO0
GPO1
SCLK
MOSI
HostProcessor
MISO
CLK
START
DRDY
CS
SCLK
DIN
DOUT
0
ADS1198
(Device0)
START
DRDY
CS
SCLK
DIN
DAISY_IN
1
ADS1194
(Device1)
START
(1)
b)Daisy-ChainConfiguration
CLK
INT
GPO
SCLK
MOSI
HostProcessor
MISO
CLK
0
DOUT
1
DAISY_IN
0
SBAS471B
– APRIL 2010 – REVISED APRIL 2011
Standard Mode
Figure 36a shows a configuration with two devices cascaded together. One of the devices is an ADS1198
(eight-channel) and the other is an ADS1194 (four-channel). Together, they create a system with 12 channels.
DOUT, SCLK, and DIN are shared. Each device has its own chip select. When a device is not selected by the
corresponding CS being driven to logic 1, the DOUT of this device is high-impedance. This structure allows the
other device to take control of the DOUT bus. This configuration method is suitable for the majority of
applications.
DAISY-CHAIN MODE
Daisy-chain mode is enabled by setting the DAISY_EN bit in the CONFIG1 register. Figure 36b shows the
daisy-chain configuration. In this mode SCLK, DIN, and CS are shared across multiple devices. The DOUT of
one device is hooked up to the DAISY_IN of the other device, thereby creating a chain. One extra SCLK must be
issued in between each data set. Also, when using daisy-chain mode the multiple readback feature is not
available. Short the DAISY_IN pin to digital ground if not used. Figure 2 (Daisy-Chain Interface Timing) describes
the required timing for the ADS1198 shown in Figure 36. Data from the ADS1198 appear first on DOUT, followed
by a don
’t care bit, and finally by the status and data words from the ADS1194.
(1) To reduce pin count, set the START pin low and use the START serial command to synchronize and start conversions.
Figure 36. Multiple Device Configurations
In a case where all devices in the chain operate in the same register setting, DIN can be shared as well and
thereby reduce the SPI communication signals to four, regardless of the number of devices. However, because
the individual devices cannot be programmed, the RLD driver cannot be shared among the multiple devices.
Furthermore, an external clock must be used.
34
Copyright
2010–2011, Texas Instruments Incorporated
Product Folder Link(s): ADS1194 ADS1196 ADS1198
相關(guān)PDF資料
PDF描述
ADS1251 "ResolutionPlus 24-Bit
ADS5102IPFBR 1.8-V ANALOG SUPPLY, 10-BIT, 65/40 MSPS ANALOG-TO-DIGITAL CONVERTERS WITH INTERNAL REFERENCE
ADS5103 "10 Bit
ADS5103CPFB 1.8-V ANALOG SUPPLY, 10-BIT, 65/40 MSPS ANALOG-TO-DIGITAL CONVERTERS WITH INTERNAL REFERENCE
ADS5103CPFBR 1.8-V ANALOG SUPPLY, 10-BIT, 65/40 MSPS ANALOG-TO-DIGITAL CONVERTERS WITH INTERNAL REFERENCE
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ADS1194IPAG 制造商:TI 制造商全稱:Texas Instruments 功能描述:Low-Power 8-Channel 16-Bit Analog Front-End for Biopotential Measurements
ADS1194IPAGR 制造商:TI 制造商全稱:Texas Instruments 功能描述:Low-Power 8-Channel 16-Bit Analog Front-End for Biopotential Measurements
ADS1196 制造商:TI 制造商全稱:Texas Instruments 功能描述:Low-Power, 8-Channel, 24-Bit Analog Front-End for Biopotential Measurements
ADS1196CPAG 功能描述:模數(shù)轉(zhuǎn)換器 - ADC Low-Pwr6Ch16B Ana Front-End for ECG RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
ADS1196CPAG 制造商:Texas Instruments 功能描述:; Resolution (Bits):16bit; Sampling Rate 制造商:Texas Instruments 功能描述:IC, ADC, 6CH, 16BIT, 8KSPS, TQFP-64
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*