參數(shù)資料
型號： ADS1194CZXGT
廠商： TEXAS INSTRUMENTS INC
元件分類： 模擬信號調(diào)理
英文描述： SPECIALTY ANALOG CIRCUIT, PBGA64
封裝： 8 X 8 MM, GREEN, PLASTIC, NFBGA-64
文件頁數(shù)： 66/76頁
文件大?。?/td> 1193K
代理商： ADS1194CZXGT
SBAS471B
– APRIL 2010 – REVISED APRIL 2011
REVISION HISTORY
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision A (September 2010) to Revision B
Page
Updated Family and Ordering Information table ................................................................................................................... 2
Added Digital Filter section to Electrical Characteristics table .............................................................................................. 4
Updated test conditions of Internal Reference, Output voltage parameter in Electrical Characteristics table ..................... 5
Updated format of Power Dissipation (Analog Supply = 3V) section in the Electrical Characteristics table ........................ 7
Changed 3V Power Dissipation, Quiescent channel power test conditions in the Electrical Characteristics table .............. 7
Updated format of Power Dissipation (Analog Supply = 5V) section in the Electrical Characteristics table ........................ 7
Changed 5V Power Dissipation, Quiescent channel power test conditions in the Electrical Characteristics table .............. 7
Changed values of -3dB Bandwidth column of Table 1 ....................................................................................................... 8
Changed values of -3dB Bandwidth column of Table 2 ....................................................................................................... 8
Changed description of VCAP3 in BGA Pin Assignments table ......................................................................................... 10
Changed CLK row in BGA Pin Assignments table ............................................................................................................. 10
Changed CLK row of PAG Pin Assignments table ............................................................................................................. 12
Changed description of VCAP3 in PAG Pin Assignments table ......................................................................................... 12
Updated and moved Figure 14 ........................................................................................................................................... 17
Changed description of CHnSET setting in Device Noise Measurements section ............................................................ 19
Changed description of (MVDDP
– MVDDN) for channels 1, 2, 5, 6, 7, and 8 in Supply Measurements (MVDDP,
MVDDN) section ................................................................................................................................................................. 20
Updated Equation 4 ............................................................................................................................................................ 23
Updated Equation 5 ............................................................................................................................................................ 23
Updated footnote 1 of Figure 26 ......................................................................................................................................... 25
Added footnote 1 to Table 6 ............................................................................................................................................... 26
Added status and GPIO register bit description to Data Retrieval section ......................................................................... 28
Changed title of Figure 29 .................................................................................................................................................. 29
Updated Figure 31 .............................................................................................................................................................. 30
Updated Figure 32 .............................................................................................................................................................. 31
Updated Figure 35 .............................................................................................................................................................. 33
Changed STANDBY: Enter STANDBY Mode description .................................................................................................. 36
Changed ID register row of Table 10 .................................................................................................................................. 40
Changed ID: ID Control Register section ........................................................................................................................... 41
Changed bit descriptions of ID: ID Control Register section .............................................................................................. 41
Changed description for bits 4 to 1 of PACE: PACE Detect Register section .................................................................... 48
Updated Figure 42 .............................................................................................................................................................. 52
Updated Figure 43 .............................................................................................................................................................. 53
Updated Figure 46 .............................................................................................................................................................. 56
Updated Figure 49 .............................................................................................................................................................. 58
Updated Figure 50 and added footnote 2 ........................................................................................................................... 60
Updated Figure 51 .............................................................................................................................................................. 61
Updated Figure 52 .............................................................................................................................................................. 61
Updated Figure 53 .............................................................................................................................................................. 63
Added Analog Input Structure section ................................................................................................................................ 65
Copyright
2010–2011, Texas Instruments Incorporated
69
Product Folder Link(s): ADS1194 ADS1196 ADS1198
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ADS1194IPAG 制造商:TI 制造商全稱:Texas Instruments 功能描述:Low-Power 8-Channel 16-Bit Analog Front-End for Biopotential Measurements
ADS1194IPAGR 制造商:TI 制造商全稱:Texas Instruments 功能描述:Low-Power 8-Channel 16-Bit Analog Front-End for Biopotential Measurements
ADS1196 制造商:TI 制造商全稱:Texas Instruments 功能描述:Low-Power, 8-Channel, 24-Bit Analog Front-End for Biopotential Measurements
ADS1196CPAG 功能描述:模數(shù)轉(zhuǎn)換器 - ADC Low-Pwr6Ch16B Ana Front-End for ECG RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32
ADS1196CPAG 制造商:Texas Instruments 功能描述:; Resolution (Bits):16bit; Sampling Rate 制造商:Texas Instruments 功能描述:IC, ADC, 6CH, 16BIT, 8KSPS, TQFP-64
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