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參數(shù)資料
| 型號： | ADSP-21061LASZ-176 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 49/52頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DSP CONTROLLER 32BIT 240MQFP |
| 產(chǎn)品培訓(xùn)模塊： | SHARC Processor Overview |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | SHARC® |
| 類型： | 浮點(diǎn) |
| 接口： | 同步串行端口（SSP） |
| 時鐘速率： | 44MHz |
| 非易失內(nèi)存： | 外部 |
| 芯片上RAM： | 128kB |
| 電壓 - 輸入/輸出： | 3.30V |
| 電壓 - 核心： | 3.30V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 240-BFQFP 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 240-MQFP-EP（32x32） |
| 包裝： | 托盤 |
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Rev. D | Page 6 of 52 | May 2013
Six channels of DMA are available on the ADSP-21061—four
via the serial ports, and two via the processor’s external port (for
either host processor, other ADSP-21061s, memory or I/O
transfers). Programs can be downloaded to the ADSP-21061
using DMA transfers. Asynchronous off-chip peripherals can
control two DMA channels using DMA request/grant lines
(DMAR1–2, DMAG1–2). Other DMA features include interrupt
generation upon completion of DMA transfers and DMA
chaining for automatic linked DMA transfers.
Serial Ports
The ADSP-21061 features two synchronous serial ports that
provide an inexpensive interface to a wide variety of digital and
mixed-signal peripheral devices. The serial ports can operate at
the full clock rate of the processor, providing each with a maxi-
mum data rate of up to 50 Mbps. Independent transmit and
receive functions provide greater flexibility for serial communi-
cations. Serial port data can be automatically transferred to and
from on-chip memory via DMA. Each of the serial ports offers
TDM multichannel mode.
The serial ports can operate with little-endian or big-endian
transmission formats, with word lengths selectable from 3 bits
to 32 bits. They offer selectable synchronization and transmit
modes as well as optional μ-law or A-law companding. Serial
port clocks and frame syncs can be internally or externally gen-
erated. The serial ports also include keyword and key mask
features to enhance interprocessor communication.
Multiprocessing
The ADSP-21061 offers powerful features tailored to multipro-
cessor DSP systems. The unified address space (see Figure 4)
allows direct interprocessor accesses of each ADSP-21061’s
internal memory. Distributed bus arbitration logic is included
on-chip for simple, glueless connection of systems containing
up to six ADSP-21061s and a host processor. Master processor
changeover incurs only one cycle of overhead. Bus arbitration is
selectable as either fixed or rotating priority. Bus lock allows
indivisible read-modify-write sequences for semaphores. A vec-
tor interrupt is provided for interprocessor commands. Maxi-
mum throughput for interprocessor data transfer is 500 Mbps
over the external port. Broadcast writes allow simultaneous
transmission of data to all ADSP-21061s and can be used to
implement reflective semaphores.
Figure 4. Memory Map
0x0004 0000
0x0010 0000
0x0008 0000
0x0018 0000
0x0012 0000
0x0028 0000
0x0038 0000
0x0000 0000
0x0002 0000
0x0040 0000
BANK 1
MS0
BANK 2
MS1
BANK 3
MS2
MS3
IOP REGISTERS
SHORT WORD ADDRESSING
(16-BIT DATA WORDS)
NORMAL WORD ADDRESSING
(32-BIT DATA WORDS
48-BIT INSTRUCTION WORDS)
ADDRESS
BANK 0
SDRAM
(OPTIONAL)
0x0FFF FFFF
NONBANKED
NOTE: BANK SIZES ARE SELECTED BY
MSIZE BITS OF THE SYSCON REGISTER
0x0030 0000
INTERNAL
MEMORY
SPACE
MULTIPROCESSOR
MEMORY
SPACE
ADDRESS
INTERNAL MEMORY SPACE
WITH ID = 001
0x003F FFFF
EXTERNAL
MEMORY
SPACE
INTERNAL MEMORY SPACE
WITH ID = 010
INTERNAL MEMORY SPACE
WITH ID = 011
INTERNAL MEMORY SPACE
WITH ID = 100
INTERNAL MEMORY SPACE
WITH ID = 101
INTERNAL MEMORY SPACE
WITH ID = 110
BROADCASTWRITE
TO ALL ADSP-21061s
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| ADSP-21061LKB-160 | 功能描述:IC DSP CONTROLLER 32BIT 225BGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號處理器） 系列:SHARC® 標(biāo)準(zhǔn)包裝:2 系列:StarCore 類型:SC140 內(nèi)核 接口:DSI，以太網(wǎng)，RS-232 時鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:1.436MB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:431-BFBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:431-FCPBGA（20x20） 包裝:托盤 |
| ADSP-21061LKB-176 | 制造商:AD 制造商全稱:Analog Devices 功能描述:DSP Microcomputer Family |
| ADSP-21061LKBZ-160 | 功能描述:IC DSP CONTROLLER 32BIT 225-BGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號處理器） 系列:SHARC® 標(biāo)準(zhǔn)包裝:2 系列:StarCore 類型:SC140 內(nèi)核 接口:DSI，以太網(wǎng)，RS-232 時鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:1.436MB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:431-BFBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:431-FCPBGA（20x20） 包裝:托盤 |
| ADSP21061LKS160 | 制造商:Analog Devices 功能描述:DSP Floating-Point 32-Bit 40MHz 40MIPS 240-Pin MQFP Tray |
| ADSP-21061LKS-160 | 制造商:Rochester Electronics LLC 功能描述:ADSP-21061 1MBIT,40MHZ, 3V SHARC - Bulk 制造商:Analog Devices 功能描述:IC SHARC DSP 40MHZ 21061 MQFP240 |
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