參數(shù)資料
型號: ADSP-2186LBSTZ-160
廠商: Analog Devices Inc
文件頁數(shù): 19/48頁
文件大小: 0K
描述: IC DSP CONTROLLER 16BIT 100LQFP
標(biāo)準(zhǔn)包裝: 1
系列: ADSP-21xx
類型: 定點
接口: 主機接口,串行端口
時鐘速率: 40MHz
非易失內(nèi)存: 外部
芯片上RAM: 40kB
電壓 - 輸入/輸出: 3.30V
電壓 - 核心: 3.30V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 100-LQFP
供應(yīng)商設(shè)備封裝: 100-LQFP(14x14)
包裝: 托盤
Rev. C
|
Page 26 of 48
|
January 2008
ADSP-2184L/ADSP-2185L/ADSP-2186L/ADSP-2187L
Memory Read
Table 17. Memory Read
Parameter
Min
Max
Unit
Timing Requirements:
tRDD
RD Low to Data Valid1
0.5tCK – 9 + w
ns
tAA
A13 – 0, xMS to Data Valid2
0.75tCK – 12.5 + w
ns
tRDH
Data Hold from RD High3
1ns
Switching Characteristics:
tRP
RD Pulse Width
0.5tCK – 5 + w
ns
tCRD
CLKOUT High to RD Low
0.25tCK – 5
0.25tCK + 7
ns
tASR
A13 – 0, xMS Setup Before RD Low
0.25tCK – 6
ns
tRDA
A13 – 0, xMS Hold After RD Deasserted
0.25tCK – 3
ns
tRWR
RD High to RD or WR Low
0.5tCK – 5
ns
1 w = wait states × t
CK.
2 xMS = PMS, DMS, CMS, IOMS, BMS.
3 For the ADSP-2187L, this specification is 0 ns min.
Figure 19. Memory Read
CLKOUT
ADDRESS LINES1
DATA LINES2
tRDA
tRWR
tRP
tASR
tCRD
tRDD
tAA
tRDH
DMS, PMS,
BMS, IOMS,
CMS
RD
WR
1ADDRESS LINES FOR ACCESSES ARE:
2DATA LINES FOR ACCESSES ARE:
BDMA: A13–0 (14 LSBs), D23–16 (8 MSBs)
BDMA: D15–8
I/O SPACE: A10–0
I/O SPACE: D23–8
EXTERNAL PM AND DM: A13–0
EXTERNAL DM: D23–8
EXTERNAL PM: D23–0
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