參數(shù)資料
型號: ADSP-2186LBSTZ-160
廠商: Analog Devices Inc
文件頁數(shù): 8/48頁
文件大小: 0K
描述: IC DSP CONTROLLER 16BIT 100LQFP
標準包裝: 1
系列: ADSP-21xx
類型: 定點
接口: 主機接口,串行端口
時鐘速率: 40MHz
非易失內存: 外部
芯片上RAM: 40kB
電壓 - 輸入/輸出: 3.30V
電壓 - 核心: 3.30V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 100-LQFP
供應商設備封裝: 100-LQFP(14x14)
包裝: 托盤
Rev. C
|
Page 16 of 48
|
January 2008
ADSP-2184L/ADSP-2185L/ADSP-2186L/ADSP-2187L
because there are no internal pull-ups to guarantee their state
during prolonged three-state conditions resulting from typical
EZ-ICE debugging sessions. These resistors may be removed
when the EZ-ICE is not being used.
Target System Interface Signals
When the EZ-ICE board is installed, the performance on some
system signals changes. Design the system to be compatible with
the following system interface signal changes introduced by the
EZ-ICE board:
EZ-ICE emulation introduces an 8 ns propagation
delay between the target circuitry and the DSP on the
RESET signal.
EZ-ICE emulation introduces an 8 ns propagation
delay between the target circuitry and the DSP on the BR
signal.
EZ-ICE emulation ignores RESET and BR, when
single-stepping.
EZ-ICE emulation ignores RESET and BR when in Emula-
tor Space (DSP halted).
EZ-ICE emulation ignores the state of target BR in certain
modes. As a result, the target system may take control of
the DSP’s external memory bus only if bus grant (BG) is
asserted by the EZ-ICE board’s DSP.
ADDITIONAL INFORMATION
This data sheet provides a general overview of ADSP-218xL
series functionality. For additional information on the architec-
ture and instruction set of the processor, refer to the ADSP-218x
DSP Hardware Reference and the ADSP-218x DSP Instruction
Set Reference.
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