- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄19387 > ADSP-BF537BBCZ-5AV (Analog Devices Inc)IC DSP CTLR 16BIT 182CSPBGA PDF資料下載
參數(shù)資料
| 型號(hào)： | ADSP-BF537BBCZ-5AV |
| 廠(chǎng)商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 11/68頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC DSP CTLR 16BIT 182CSPBGA |
| 產(chǎn)品培訓(xùn)模塊： | Blackfin® Processor Core Architecture Overview Blackfin® Device Drivers Blackfin® Optimizations for Performance and Power Consumption Blackfin® System Services |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | Blackfin® |
| 類(lèi)型： | 定點(diǎn) |
| 接口： | CAN，SPI，SSP，TWI，UART |
| 時(shí)鐘速率： | 533MHz |
| 非易失內(nèi)存： | 外部 |
| 芯片上RAM： | 132kB |
| 電壓 - 輸入/輸出： | 3.30V |
| 電壓 - 核心： | 1.25V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類(lèi)型： | 表面貼裝 |
| 封裝/外殼： | 182-LFBGA，CSPBGA |
| 供應(yīng)商設(shè)備封裝： | 182-CSPBGA（12x12） |
| 包裝： | 托盤(pán) |
| 配用： | ADZS-BF537-ASKIT-ND - BOARD EVAL SKIT ADSP-BF537 ADZS-BFAUDIO-EZEXT-ND - BOARD EVAL AUDIO BLACKFIN ADZS-BF537-EZLITE-ND - BOARD EVAL ADSP-BF537 ADZS-BFAV-EZEXT-ND - BOARD DAUGHT ADSP-BF533,37,61KIT ADZS-BF537-STAMP-ND - SYSTEM DEV FOR ADSP-BF537 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)當(dāng)前第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)
Rev. J
|
Page 19 of 68
|
February 2014
PIN DESCRIPTIONS
The ADSP-BF534/ADSP-BF536/ADSP-BF537 processors pin
definitions are listed in Table 9. In order to maintain maximum
functionality and reduce package size and pin count, some pins
have dual, multiplexed functions. In cases where pin function is
reconfigurable, the default state is shown in plain text, while the
alternate function is shown in italics. Pins shown with an aster-
isk after their name (*) offer high source/high sink current
capabilities.
All pins are three-stated during and immediately after reset,
with the exception of the external memory interface, asynchro-
nous and synchronous memory control, and the buffered XTAL
output pin (CLKBUF). On the external memory interface, the
control and address lines are driven high, with the exception of
CLKOUT, which toggles at the system clock rate. If BR is active
(whether or not RESET is asserted), the memory pins are also
three-stated. During hibernate, all outputs are three-stated
unless otherwise noted in Table 9.
All I/O pins have their input buffers disabled with the exception
of the pins noted in the data sheet that need pull-ups or pull-
downs if unused.
The SDA (serial data) and SCL (serial clock) pins are open drain
and therefore require a pull-up resistor. Consult version 2.1 of
the I2C specification for the proper resistor value.
Table 9. Pin Descriptions
Pin Name
Type Function
Driver
Type1
Memory Interface
ADDR19–1
O
Address Bus for Async Access
A
DATA15–0
I/O
Data Bus for Async/Sync Access
A
ABE1–0/SDQM1–0
O
Byte Enables/Data Masks for Async/Sync Access
A
BR
I
Bus Request (This pin should be pulled high when not used.)
BG
OBus Grant
A
BGH
O
Bus Grant Hang
A
Asynchronous Memory Control
AMS3–0
O
Bank Select (Require pull-ups if hibernate is used.)
A
ARDY
I
Hardware Ready Control
AOE
O
Output Enable
A
ARE
ORead Enable
A
AWE
OWrite Enable
A
Synchronous Memory Control
SRAS
O
Row Address Strobe
A
SCAS
O
Column Address Strobe
A
SWE
OWrite Enable
A
SCKE
O
Clock Enable(Requires a pull-down if hibernate with SDRAM self-refresh is
used.)
A
CLKOUT
O
Clock Output
B
SA10
O
A10 Pin
A
SMS
OBank Select
A
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TPSD157M006Y0125 | CAP TANT 150UF 6.3V 20% 2917 |
| RW2-243.3D/H3/B | CONV DC/DC 2W 18-36VIN +/-3.3V |
| AMC26DREN | CONN EDGECARD 52POS .100 EYELET |
| ACC40DREN | CONN EDGECARD 80POS .100 EYELET |
| RCC05DRYH | CONN EDGECARD 10POS DIP .100 SLD |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADSP-BF537BBCZ-5AV | 制造商:Analog Devices 功能描述:Digital Signal Processor IC |
| ADSP-BF537BBCZ5AVX | 制造商:Analog Devices 功能描述:- Trays |
| ADSP-BF537BBCZ-5AVX | 制造商:Rochester Electronics LLC 功能描述: 制造商:Analog Devices 功能描述: |
| ADSP-BF537BBCZ-5AX | 制造商:Analog Devices 功能描述:182-MBGA PB-FREE - Trays |
| ADSP-BF537BBCZ-5B | 功能描述:IC DSP CTLR 16BIT 208CSPBGA RoHS:是 類(lèi)別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號(hào)處理器） 系列:Blackfin® 標(biāo)準(zhǔn)包裝:2 系列:StarCore 類(lèi)型:SC140 內(nèi)核 接口:DSI，以太網(wǎng)，RS-232 時(shí)鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:1.436MB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:-40°C ~ 105°C 安裝類(lèi)型:表面貼裝 封裝/外殼:431-BFBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:431-FCPBGA（20x20） 包裝:托盤(pán) |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。