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參數(shù)資料
| 型號： | ADV7180WBCPZ-REEL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 82/116頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC VIDEO DECODER SDTV 40LFCSP |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 類型： | 視頻解碼器 |
| 應(yīng)用： | 數(shù)碼相機(jī)，手機(jī)，便攜式視頻 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 40-VFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 40-LFCSP-VQ（6x6） |
| 包裝： | 帶卷 (TR) |
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ADV7180
Data Sheet
Rev. I | Page 68 of 116
Table 85. GS/VPS/PDC/UTC Readback Registers1
Signal Name
Register Location
Dec Address (User Sub Map)
Hex Address (User Sub Map)
GS_VPS_PDC_UTC_BYTE_0[7:0]
VDP_GS_VPS_PDC_UTC_0[7:0]
132
0x84
GS_VPS_PDC_UTC_BYTE_1[7:0]
VDP_GS_VPS_PDC_UTC_1[7:0]
133
0x85
GS_VPS_PDC_UTC_BYTE_2[7:0]
VDP_GS_VPS_PDC_UTC_2[7:0]
134
0x86
GS_VPS_PDC_UTC_BYTE_3[7:0]
VDP_GS_VPS_PDC_UTC_3[7:0]
135
0x87
VPS_PDC_UTC_BYTE_4[7:0]
VDP_VPS_PDC_UTC_4[7:0]
136
0x88
VPS_PDC_UTC_BYTE_5[7:0]
VDP_VPS_PDC_UTC_5[7:0]
137
0x89
VPS_PDC_UTC_BYTE_6[7:0]
VDP_VPS_PDC_UTC_6[7:0]
138
0x8A
VPS_PDC_UTC_BYTE_7[7:0]
VDP_VPS_PDC_UTC_7[7:0]
139
0x8B
VPS_PDC_UTC_BYTE_8[7:0]
VDP_VPS_PDC_UTC_8[7:0]
140
0x8C
VPS_PDC_UTC_BYTE_9[7:0]
VDP_VPS_PDC_UTC_9[7:0]
141
0x8D
VPS_PDC_UTC_BYTE_10[7:0]
VDP_VPS_PDC_UTC_10[7:0]
142
0x8E
VPS_PDC_UTC_BYTE_11[7:0]
VDP_VPS_PDC_UTC_11[7:0]
143
0x8F
VPS_PDC_UTC_BYTE_12[7:0]
VDP_VPS_PDC_UTC_12[7:0]
144
0x90
1
The default value does not apply to readback registers.
VBI System 2
The user has an option of using a different VBI data slicer called
VBI System 2. This data slicer is used to decode Gemstar and
closed caption VBI signals only.
Using this system, the Gemstar data is available only in the
ancillary data stream. A special mode enables one line of data to
be read back through I2C.
Gemstar Data Recovery
The Gemstar-compatible data recovery block (GSCD) supports
1× and 2× data transmissions. In addition, it can serve as a closed
caption decoder. Gemstar-compatible data transmissions can
occur only in NTSC. Closed caption data can be decoded in
both PAL and NTSC.
The block can be configured via I2C as follows:
GDECEL[15:0] allows data recovery on selected video lines
on even fields to be enabled or disabled.
GDECOL[15:0] enables the data recovery on selected lines
for odd fields.
GDECAD[0] configures the way in which data is
embedded in the video data stream.
The recovered data is not available through I2C but is inserted into
the horizontal blanking period of an ITU-R BT.656-compatible
data stream. The data format is intended to comply with the
recommendation by the International Telecommunications
Union, ITU-R BT.1364. For more information, visit the
International Telecommunication Union website. See Figure 52.
GDE_SEL_OLD_ADF, Address 0x4C[3], User Sub Map
The ADV7180 has a new ancillary data output block that
can be used by the VDP data slicer and the VBI System 2
data slicer. The new ancillary data formatter is used by setting
GDE_SEL_OLD_ADF to 0 (default). See Table 74 and Table 75
for information about how the data is packaged in the ancillary
data stream when this bit is set low.
To use the old ancillary data formatter (to be backward compatible
with the ADV7183B), set GDE_SEL_OLD_ADF to 1. The ancillary
data format in this section refers to the ADV7183B-compatible
ancillary data formatter.
Setting GDE_SEL_OLD_ADF to 0 (default) enables a new
ancillary data system for use with the VDP and VBI System 2.
Setting GDE_SEL_OLD_ADF to 1 enables the old ancillary
data system for use with the VBI System 2 only (ADV7183B
compatible).
The format of the data packet depends on the following criteria:
Transmission is 1× or 2×.
Data is output in 8-bit or 4-bit format (see the description
of the bit).
Data is closed caption (CCAP) or Gemstar compatible.
Data packets are output if the corresponding enable bit is set
0x4B[7:0] sections), and the decoder detects the presence of
data. For video lines where no data is decoded, no data packet
is output, even if the corresponding line enable bit is set.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADV7180WBST48Z | 制造商:Analog Devices 功能描述: |
| ADV7180WBST48Z-RL | 功能描述:視頻 IC 10-bit 4x Oversampling SDTV Decoder RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
| ADV7180WBSTZ | 功能描述:視頻 IC 10-bit 4x Oversampling SDTV Decoder RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
| ADV7180WBSTZ-REEL | 功能描述:視頻 IC 10-bit 4x Oversampling SDTV Decoder RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
| ADV7181 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Multiformat SDTV Video Decoder |
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