參數(shù)資料
型號(hào)： ADV7183A
廠商： Analog Devices, Inc.
英文描述： Multiformat SDTV Video Decoder
中文描述： 標(biāo)清多格式視頻解碼器
文件頁(yè)數(shù)： 41/104頁(yè)
文件大?。?/td> 894K
代理商： ADV7183A
ADV7183A
BL_C_VBI Blank Chroma during VBI (SDP),
Address 0x04, [2]
Setting BL_C_VBI high, the Cr and Cb values of all VBI lines
get blanked. This is done so any data that may come during VBI
is not decoded as color and output through Cr and Cb. As a
result, it should be possible to send VBI lines into the decoder,
then output them through an encoder again, undistorted.
Without this blanking, any wrongly decoded color gets encoded
by the video encoder; therefore, the VBI lines are distorted.
Table 93. BL_C_VBI Function
BL_C_VBI
Description
0
Decode and output color during VBI.
1*
Blank Cr and Cb values during VBI (no color, 0x80).
*Default value.
Rev. A | Page 41 of 104
RANGE Range Selection (SDP), Address 0x04, [0]
AV codes (as per ITU-R BT-656, formerly known as CCIR-656)
consist of a fixed header made up of 0xFF and 0x00 values.
These two values are reserved and therefore are not to be used
for active video. Additionally, the ITU also specifies that the
nominal range for video should be restricted to values between
16 and 235 for luma and 16 to 240 for chroma.
The RANGE bit allows the user to limit the range of values
output by the ADV7183A to the recommended value range. In
any case, it is ensured that the reserved values of 255
d
(0xFF)
and 00
d
(0x00) are not presented on the output pins unless they
are part of an AV code header.
Table 94. RANGE Function
RANGE
Description
0
16 ≤ Y ≤ 235
1*
1 ≤ Y ≤ 254
*Default value.
16 ≤ C/P ≤ 240
1 ≤ C/P ≤ 254
AUTO_PDC_EN Automatic Programmed Delay Control
(SDP), Address 0x27, [6]
Enabling the AUTO_PDC_EN function activates a function
within the ADV7183A that automatically programs the
LTA[1:0] and CTA[2:0] to have the chroma and luma data
match delays for all modes of operation. If set, manual registers
LTA[1:0] and CTA[2:0] are not used by the SDP. If the
automatic mode is disabled (via setting the AUTO_PDC_EN bit
to 0), the values programmed into LTA[1:0] and CTA[2:0]
registers take effect.
Table 95. AUTO_PDC_EN Function
AUTO_PDC_EN
Description
0
Use LTA[1:0] and CTA[2:0] values for delaying
luma and chroma samples. Refer to the
LTA[1:0] Luma Timing Adjust (SDP), Address
0x27, [1:0] and CTA[2:0] Chroma Timing
Adjust (SDP), Address 0x27, [5:3] sections.
1*
The ADV7183A automatically determines the
LTA and CTA values to have luma and chroma
aligned at the output.
*Default value.
LTA[1:0] Luma Timing Adjust (SDP), Address 0x27, [1:0]
The Luma Timing Adjust register allows the user to specify a
timing difference between chroma and luma samples.
Please note the following:
There is a certain functionality overlap with the CTA[2:0]
register.
For manual programming, use the following defaults:
o
CVBS input LTA[1:0] = 00.
o
YC input LTA[1:0] = 01.
o
YPrPb input LTA[1:0] =01.
Table 96. LTA Function
LTA[1:0]
Description
00*
No delay.
01
Luma 1 clk (37 ns) delayed.
10
Luma 2clk (74 ns) early.
11
Luma 1 clk (37 ns) early.
*Default value.
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