參數(shù)資料
型號(hào): ADZS-BF537-ASKIT
廠商: Analog Devices Inc
文件頁(yè)數(shù): 39/68頁(yè)
文件大?。?/td> 0K
描述: BOARD EVAL SKIT ADSP-BF537
產(chǎn)品培訓(xùn)模塊: Blackfin® Processor Core Architecture Overview
Blackfin® Device Drivers
Blackfin® Optimizations for Performance and Power Consumption
Blackfin® System Services
標(biāo)準(zhǔn)包裝: 1
系列: Blackfin®
類型: DSP:音頻
適用于相關(guān)產(chǎn)品: ADSP-BF537
所含物品:
相關(guān)產(chǎn)品: ADSP-BF537KBCZ-6BV-ND - IC DSP CTLR 16BIT 208CSPBGA
ADSP-BF537BBCZ-5BV-ND - IC DSP CTLR 16BIT 208CSPBGA
ADSP-BF537KBCZ-6AV-ND - IC DSP CTLR 16BIT 182CSPBGA
ADSP-BF537BBCZ-5AV-ND - IC DSP CTLR 16BIT 182CSPBGA
ADSP-BF537BBCZ-5B-ND - IC DSP CTLR 16BIT 208CSPBGA
ADSP-BF537BBC-5A-ND - IC DSP CTLR 16BIT 182CSPBGA
Rev. J
|
Page 44 of 68
|
February 2014
General-Purpose Port Timing
Table 36 and Figure 26 describe general-purpose
port operations.
Universal Asynchronous Receiver-Transmitter
(UART) Ports—Receive and Transmit Timing
For information on the UART port receive and transmit opera-
tions, see the ADSP-BF537 Blackfin Processor Hardware
Reference.
Table 36. General-Purpose Port Timing
Parameter
Min
Max
Unit
Timing Requirement
tWFI
General-Purpose Port Pin Input Pulse Width
tSCLK + 1
ns
Switching Characteristic
tGPOD
General-Purpose Port Pin Output Delay from CLKOUT Low
0
6
ns
Figure 26. General-Purpose Port Timing
CLKOUT
GPIO OUTPUT
GPIO INPUT
tWFI
tGPOD
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