參數(shù)資料
型號: AGLE600V5-FG484C
元件分類: FPGA
英文描述: FPGA, 13824 CLBS, 600000 GATES, PBGA484
封裝: 23 X 23 MM, 2.23 MM HEIGHT, 1 MM PITCH, FBGA-484
文件頁數(shù): 111/156頁
文件大小: 5023K
代理商: AGLE600V5-FG484C
IGLOOe DC and Switching Characteristics
2- 44
Advance v0.3
Voltage-Referenced I/O Characteristics
3.3 V GTL
Gunning Transceiver Logic is a high-speed bus standard (JESD8-3). It provides a differential
amplifier input buffer and an open-drain output buffer. The VCCI pin should be connected to
3.3 V.
Table 2-65 Minimum and Maximum DC Input and Output Levels
3.3 V GTL
VIL
VIH
VOL
VOH
IOL IOH
IOSL
IOSH
IIL
IIH
Drive
Strength
Min., V
Max., V
Min., V
Max., V Max., V Min., V mA mA Max., mA1 Max., mA1 A2 A2
25 mA3
–0.3
VREF – 0.05 VREF + 0.05
3.6
0.4
25 25
268
181
10
Notes:
1. Currents are measured at 100°C junction temperature and maximum voltage.
2. Currents are measured at 85°C junction temperature.
3. Output drive strength is below JEDEC specification.
Figure 2-13 AC Loading
Table 2-66 AC Waveforms, Measuring Points, and Capacitive Loads
Input LOW (V)
Input HIGH (V)
Measuring
Point* (V)
VREF (typ.) (V)
VTT (typ.) (V)
CLOAD (pF)
VREF – 0.05
VREF + 0.05
0.8
1.2
10
* Measuring point = Vtrip. See Table 2-22 on page 2-22 for a complete table of trip points.
Test Point
10 pF
25
GTL
VTT
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