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參數(shù)資料
| 型號： | AGLN250V2-CSG81 |
| 廠商： | Microsemi SoC |
| 文件頁數(shù)： | 48/150頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC FPGA 250K 1.2-1.5V CSP81 |
| 標(biāo)準(zhǔn)包裝： | 640 |
| 系列： | IGLOO nano |
| 邏輯元件/單元數(shù)： | 6144 |
| RAM 位總計(jì)： | 36864 |
| 輸入/輸出數(shù)： | 60 |
| 門數(shù)： | 250000 |
| 電源電壓： | 1.14 V ~ 1.575 V |
| 安裝類型： | 表面貼裝 |
| 工作溫度： | -20°C ~ 70°C |
| 封裝/外殼： | 81-WFBGA，CSBGA |
| 供應(yīng)商設(shè)備封裝： | 81-CSP（5x5） |
| 其它名稱： | 1100-1133 |
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Revision 17
5-1
5 – Datasheet Information
List of Changes
The following table lists critical changes that were made in each version of the IGLOO nano datasheet.
Revision
Changes
Page
Revision 17
(May 2013)
Deleted details related to Ambient temperature from "Enhanced Commercial
Offerings", and Table 2-2 Recommended Operating Conditions 1 to remove ambiguities
arising due to the same, and modified Note 2 (SAR 47063).
and 2-2
Revision 16
(December 2012)
The "IGLOO nano Ordering Information" section has been updated to mention "Y" as
"Blank" mentioning "Device Does Not Include License to Implement IP Based on the
Cryptography Research, Inc. (CRI) Patent Portfolio" (SAR 43174).
The note in Table 2-100 IGLOO nano CCC/PLL Specification and Table 2-101 IGLOO
nano CCC/PLL Specification referring the reader to SmartGen was revised to refer
instead to the online help associated with the core (SAR 42565).
2-70,
Live at Power-Up (LAPU) has been replaced with ’Instant On’.
NA
Revision 15
(September 2012)
The status of the AGLN125 device has been modified from ’Advance’ to ’Production’ in
the "IGLOO nano Device Status" section (SAR 41416).
Libero Integrated Design Environment (IDE) was changed to Libero System-on-Chip
(SoC) throughout the document (SAR 40274).
NA
Revision 14
(September 2012)
The "Security" section was modified to clarify that Microsemi does not support read-back
of programmed data.
Revision 13
(June 2012)
Figure Figure 2-34 FIFO Read and Figure 2-35 FIFO Write have been added (SAR
34842).
The following sentence was removed from the "VMVx I/O Supply Voltage (quiet)" section
in the "Pin Descriptions" section: "Within the package, the VMV plane is decoupled from
the simultaneous switching noise originating from the output buffer VCCI domain" and
replaced with “Within the package, the VMV plane biases the input stage of the I/Os in
the I/O banks” (SAR 38319). The datasheet mentions that "VMV pins must be connected
to the corresponding VCCI pins" for an ESD enhancement.
Revision 12
(March 2012)
revised to clarify that although no existing security measures can give an absolute
guarantee, Microsemi FPGAs implement the best security available in the industry (SAR
34663).
Notes indicating that AGLN015 is not recommended for new designs have been added
(SAR 35759).
Notes indicating that nano-Z devices are not recommended for new designs have been
added. The "Devices Not Recommended For New Designs" section is new (SAR
36759).
The Y security option and Licensed DPA Logo were added to the "IGLOO nano Ordering
Information" section. The trademarked Licensed DPA Logo identifies that a product is
covered by a DPA counter-measures license from Cryptography Research (SAR 34722).
The following sentence was removed from the "Advanced Architecture" section: "In
addition, extensive on-chip programming circuitry enables rapid, single-voltage (3.3 V)
programming of IGLOO nano devices via an IEEE 1532 JTAG interface" (SAR 34683).
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AGLN250V2-CSG81I | 功能描述:IC FPGA NANO 1KB 250K 81-CSP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:IGLOO nano 標(biāo)準(zhǔn)包裝:152 系列:IGLOO PLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):792 RAM 位總計(jì):- 輸入/輸出數(shù):120 門數(shù):30000 電源電壓:1.14 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 85°C 封裝/外殼:289-TFBGA，CSBGA 供應(yīng)商設(shè)備封裝:289-CSP（14x14） |
| AGLN250V2-DIELOT | 制造商:Microsemi Corporation 功能描述:AGLN250V2-DIELOT - Gel-pak, waffle pack, wafer, diced wafer on film 制造商:Microsemi SOC Products Group 功能描述:AGLN250V2-DIELOT - Gel-pak, waffle pack, wafer, diced wafer on film |
| AGLN250V2-QNG100I | 制造商:Microsemi Corporation 功能描述:FPGA IGLOO NANO FAMILY 250K GATES 130NM (CMOS) TECHNOLOGY 1. - Trays |
| AGLN250V2-VQ100 | 功能描述:IC FPGA NANO 1KB 250K 100VQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:IGLOO nano 標(biāo)準(zhǔn)包裝:152 系列:IGLOO PLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):792 RAM 位總計(jì):- 輸入/輸出數(shù):120 門數(shù):30000 電源電壓:1.14 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 85°C 封裝/外殼:289-TFBGA，CSBGA 供應(yīng)商設(shè)備封裝:289-CSP（14x14） |
| AGLN250V2-VQ100I | 功能描述:IC FPGA NANO 1KB 250K 100VQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:IGLOO nano 標(biāo)準(zhǔn)包裝:152 系列:IGLOO PLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):792 RAM 位總計(jì):- 輸入/輸出數(shù):120 門數(shù):30000 電源電壓:1.14 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 85°C 封裝/外殼:289-TFBGA，CSBGA 供應(yīng)商設(shè)備封裝:289-CSP（14x14） |
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