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參數(shù)資料
| 型號(hào)： | AGLN250V2-CSG81 |
| 廠商： | Microsemi SoC |
| 文件頁(yè)數(shù)： | 53/150頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC FPGA 250K 1.2-1.5V CSP81 |
| 標(biāo)準(zhǔn)包裝： | 640 |
| 系列： | IGLOO nano |
| 邏輯元件/單元數(shù)： | 6144 |
| RAM 位總計(jì)： | 36864 |
| 輸入/輸出數(shù)： | 60 |
| 門數(shù)： | 250000 |
| 電源電壓： | 1.14 V ~ 1.575 V |
| 安裝類型： | 表面貼裝 |
| 工作溫度： | -20°C ~ 70°C |
| 封裝/外殼： | 81-WFBGA，CSBGA |
| 供應(yīng)商設(shè)備封裝： | 81-CSP（5x5） |
| 其它名稱： | 1100-1133 |
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Datasheet Information
5-6
Revision 17
Revision 2 (Dec 2008)
Product Brief Advance
v0.4
The second table note in "IGLOO nano Devices" table was revised to state,
"AGLN060, AGLN125, and AGLN250 in the CS81 package do not support PLLs.
AGLN030 and smaller devices do not support this feature."
The I/Os per package for CS81 were revised to 60 for AGLN060, AGLN125, and
AGLN250 in the "I/Os Per Package"table.
Packaging Advance
v0.3
The "UC36" pin table is new.
Revision 1 (Nov 2008)
Product Brief Advance
v0.3
The "Advanced I/Os" section was updated to include wide power supply voltage
support for 1.14 V to 1.575 V.
The AGLN030 device was added to product tables and replaces AGL030 entries
that were formerly in the tables.
The "I/Os Per Package"table was updated for the CS81 package to change the
number of I/Os for AGLN060, AGLN125, and AGLN250 from 66 to 64.
The "Wide Range I/O Support" section is new.
The table notes and references were revised in Table 2-2 Recommended
Operating Conditions 1. VMV was included with VCCI and a table note was added
stating, "VMV pins must be connected to the corresponding VCCI pins. See Pin
Descriptions for further information." Please review carefully.
VJTAG was added to the list in the table note for Table 2-9 Quiescent Supply
added for AGLN010, AGLN015, and AGLN030 for 1.5 V.
VCCI was removed from the list in the table note for Table 2-10 Quiescent
Values for ICCA current were updated for AGLN010, AGLN015, and AGLN030 in
Values for PAC1 and PAC2 were added to Table 2-15 Different Components
Table notes regarding wide range support were added to Table 2-21 Summary of
1.2 V LVCMOS wide range values were added to Table 2-22 Summary of
The following table note was added to Table 2-25 Summary of I/O Timing
Timing Characteristics—Software Default Settings: "All LVCMOS 3.3 V software
macros support LVCMOS 3.3 V wide range, as specified in the JESD8-B
specification."
3.3 V LVCMOS Wide Range and 1.2 V Wide Range were added to Table 2-28
Revision / Version
Changes
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AGLN250V2-CSG81I | 功能描述:IC FPGA NANO 1KB 250K 81-CSP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場(chǎng)可編程門陣列） 系列:IGLOO nano 標(biāo)準(zhǔn)包裝:152 系列:IGLOO PLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):792 RAM 位總計(jì):- 輸入/輸出數(shù):120 門數(shù):30000 電源電壓:1.14 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 85°C 封裝/外殼:289-TFBGA，CSBGA 供應(yīng)商設(shè)備封裝:289-CSP（14x14） |
| AGLN250V2-DIELOT | 制造商:Microsemi Corporation 功能描述:AGLN250V2-DIELOT - Gel-pak, waffle pack, wafer, diced wafer on film 制造商:Microsemi SOC Products Group 功能描述:AGLN250V2-DIELOT - Gel-pak, waffle pack, wafer, diced wafer on film |
| AGLN250V2-QNG100I | 制造商:Microsemi Corporation 功能描述:FPGA IGLOO NANO FAMILY 250K GATES 130NM (CMOS) TECHNOLOGY 1. - Trays |
| AGLN250V2-VQ100 | 功能描述:IC FPGA NANO 1KB 250K 100VQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場(chǎng)可編程門陣列） 系列:IGLOO nano 標(biāo)準(zhǔn)包裝:152 系列:IGLOO PLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):792 RAM 位總計(jì):- 輸入/輸出數(shù):120 門數(shù):30000 電源電壓:1.14 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 85°C 封裝/外殼:289-TFBGA，CSBGA 供應(yīng)商設(shè)備封裝:289-CSP（14x14） |
| AGLN250V2-VQ100I | 功能描述:IC FPGA NANO 1KB 250K 100VQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場(chǎng)可編程門陣列） 系列:IGLOO nano 標(biāo)準(zhǔn)包裝:152 系列:IGLOO PLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):792 RAM 位總計(jì):- 輸入/輸出數(shù):120 門數(shù):30000 電源電壓:1.14 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 85°C 封裝/外殼:289-TFBGA，CSBGA 供應(yīng)商設(shè)備封裝:289-CSP（14x14） |
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