參數(shù)資料
型號(hào)： AK4122
廠商： Electronic Theatre Controls, Inc.
英文描述： 24 BIT 96KHZ SRC WITH DIR
中文描述： 24位96kHz Src與迪爾
文件頁(yè)數(shù)： 4/54頁(yè)
文件大?。?/td> 403K
代理商： AK4122
ASAHI KASEI
[AK4122]
MS0267-E-03
2004/08
- 4 -
PIN/FUNCTION
No. Pin Name
1
CDTI
2
CDTO
3
TST1
4
INT2
5
TST2
I/O
I
O
O
O
O
Function
Control Data Input Pin
Control Data Output Pin
Test 1 Pin
Interrupt 2 Pin
Test 2 Pin
Test 3 Pin
This pin should be connected to DVSS.
Master / Slave Mode Pin for PORT2
“H” : Master mode, “L” : Slave Mode
Master / Slave Mode Pin for PORT3
“H” : Master mode, “L” : Slave Mode
Soft Mute Pin
“H” : Soft Mute, “L” : Normal Operation
Test 4 Pin
This pin should be connected to AVSS.
Test 5 Pin
This pin should be connected to AVSS.
PLL Loop Filter Pin
470
±
5% resistor and 2.2
μ
F
±
50% ceramic capacitor in parallel with a
2.2nF
±
50% ceramic capacitor should be connected to AVSS externally.
Analog Ground Pin
Analog Power Supply Pin, 3.0
～
3.6V
Test 6 Pin
This pin should be connected to AVSS.
Receiver Input 1 Pin with Amp for 0.2Vpp (Internal Biased Pin)
Test 7 Pin
This pin should be connected to AVSS.
Receiver Input 2 Pin with Amp for 0.2Vpp (Internal Biased Pin)
Test 8 Pin
This pin should be connected to AVSS.
Receiver Input 3 Pin with Amp for 0.2Vpp (Internal Biased Pin)
Test 9 Pin
This pin should be connected to AVSS.
Receiver Input 4 Pin with Amp for 0.2Vpp (Internal Biased Pin)
Test 10 Pin
This pin should be connected to AVSS.
Test 11 Pin
6
TST3
I
7
M/S2
I
8
M/S3
I
9
SMUTE
I
10
TST4
I
11
TST5
I
12
FILT
O
13
14
AVSS
AVDD
-
-
15
TST6
I
16
RX1
I
17
TST7
I
18
RX2
I
19
TST8
I
20
RX3
I
21
TST9
I
22
RX4
I
23
TST10
I
24
TST11
O
Note: All input pins except internal biased pins should not be left floating.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AK4122_1 制造商:AKM 制造商全稱:AKM 功能描述:24-Bit 96kHz SRC with DIR
AK4122A 制造商:AKM 制造商全稱:AKM 功能描述:24-Bit 96kHz SRC with DIR
AK4122AVQ 制造商:AKM 制造商全稱:AKM 功能描述:24-Bit 96kHz SRC with DIR
AK4122AVQP-L 制造商:Asahi Kasei Microsystems Co Ltd 功能描述:SRC + DIR
AK4122VQ 制造商:AKM 制造商全稱:AKM 功能描述:24-Bit 96kHz SRC with DIR
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