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參數(shù)資料
| 型號(hào)： | AM41LV3204MT10IT |
| 廠商： | ADVANCED MICRO DEVICES INC |
| 元件分類： | 存儲(chǔ)器 |
| 英文描述： | Stacked Multi-chip Package (MCP) 32 Mbit (4 M x 8 bit/2 M x 16-bit) Flash Memory and 4 Mbit (512K x 8-Bit/256 K x 16-Bit) Static RAM |
| 中文描述： | SPECIALTY MEMORY CIRCUIT, PBGA69 |
| 封裝： | 8 X 10 MM, 1.20 MM HEIGHT, FBGA-69 |
| 文件頁(yè)數(shù)： | 44/67頁(yè) |
| 文件大小： | 484K |
| 代理商： | AM41LV3204MT10IT |
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June 10, 2003
Am41LV3204M
43
P R E L I M I N A R Y
AC CHARACTERISTICS
Flash Read-Only Operations
Notes:
1. Not 100% tested.
2. See Figure 12 and
Table 12
for test specifications.
Parameter
Description
Test Setup
Speed
JEDEC
Std.
Unit
t
AVAV
t
RC
Read Cycle Time (Note 1)
Min
100
ns
t
AVQV
t
ACC
Address to Output Delay
CE#, OE# = V
IL
Max
100
ns
t
ELQV
t
CE
Chip Enable to Output Delay
OE# = V
IL
Max
100
ns
t
PACC
Page Access Time
Max
30
ns
t
GLQV
t
OE
Output Enable to Output Delay
Max
30
ns
t
EHQZ
t
DF
Chip Enable to Output High Z (Note 1)
Max
30
ns
t
GHQZ
t
DF
Output Enable to Output High Z (Note 1)
Max
30
ns
t
AXQX
t
OH
Output Hold Time From Addresses, CE# or OE#,
Whichever Occurs First
Min
0
ns
t
OEH
Output Enable Hold
Time (Note 1)
Read
Min
0
ns
Toggle and
Data# Polling
Min
10
ns
t
OH
t
CE
Outputs
WE#
Addresses
CE#f
OE#
HIGH Z
Output Valid
HIGH Z
Addresses Stable
t
ACC
t
RC
t
OEH
t
RH
t
OE
t
RH
RESET#f
t
DF
Figure 14.
Read Operation Timings
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| AM41PDS3224DB10IT | 32 Megabit (2 M x 16-Bit) CMOS 1.8 Volt-only, Simultaneous Operation, Page Mode Flash Memory and 4 Mbit (512 K x 8-Bit/256 K x 16-Bit) Static RAM |
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