- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄362278 > AM50DL128BG Am50DL128BG - Stacked Multi-Chip Package (MCP) Flash Memory and SRAM PDF資料下載
參數(shù)資料
| 型號： | AM50DL128BG |
| 英文描述： | Am50DL128BG - Stacked Multi-Chip Package (MCP) Flash Memory and SRAM |
| 中文描述： | Am50DL128BG -堆疊式多芯片封裝（MCP）閃存和SRAM |
| 文件頁數(shù)： | 10/70頁 |
| 文件大小： | 1042K |
| 代理商： | AM50DL128BG |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁當前第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁
May 19, 2003
Am50DL9608G
9
P R E L I M I N A R Y
ORDERING INFORMATION
The order number (Valid Combination) is formed by the following:
Valid Combinations
Valid Combinations list configurations planned to be supported in vol-
ume for this device. Consult the local AMD sales office to confirm
availability of specific valid combinations and to check on newly re-
leased combinations.
MCP DEVICE BUS OPERATIONS
This section describes the requirements and use of
the device bus operations, which are initiated through
the internal command register. The command register
itself does not occupy any addressable memory loca-
tion. The register is a latch used to store the com-
mands, along with the address and data information
needed to execute the command. The contents of the
register serve as inputs to the internal state machine.
The state machine outputs dictate the function of the
device. Tables 1-2 lists the device bus operations, the
inputs and control levels they require, and the result-
ing output. The following subsections describe each of
these operations in further detail.
Am50DL960
8
G
T
75
I
T
TAPE AND REEL
T
=
S
=
7 inches
13 inches
TEMPERATURE RANGE
I
=
Industrial (–40
°
C to +85
°
C)
SPEED OPTION
75
=
70
=
70 ns Flash + 55 ns pSRAM
70 ns Flash + 70 ns pSRAM (See page 5)
BOOT SECTOR ARCHITECTURE
T
=
Top Boot of Am29DL320G Flash
B
=
Bottom Boot of Am29DL320G Flash
PROCESS TECHNOLOGY
G
=
0.17 μm
PSEUDO SRAM DEVICE DENSITY
8
=
8 Mbits
AMD DEVICE NUMBER/DESCRIPTION
Am50DL9608G
Stacked Multi-Chip Package (MCP) Flash Memory and Pseudo SRAM
Am29DL640G 64 Megabit (8/4 M x 16-Bit) and
Am29DL320G 32 Megabit (4/2 M x 16-Bit)
CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory
and 8 Mbit (152 K x 16-Bit) Pseudo Static RAM
Valid Combinations
Order Number
Package Marking
Am50DL9608GT70I
Am50DL9608GB70I
T, S
M500000010
M500000011
Am50DL9608GT75I
Am50DL9608GB75I
T, S
M500000012
M500000013
相關PDF資料 |
PDF描述 |
|---|---|
| AM50DL128CG | 2 x 64 Mbit (8 M x 8-Bit/4 M x 16-Bit) CMOS and 64 Mbit (2 M x 16-Bit) Pseudo Static RAM (Preliminary) |
| AM50DL128CH | Am50DL128CH - Stacked Multi-Chip Package (MCP) Flash Memory and SRAM |
| AM52-0001 | 1.2 W High Efficiency Power Amplifier 800 - 960 MHz |
| AM52-0001SMB | 1.2 W High Efficiency Power Amplifier 800 - 960 MHz |
| AM52-0001TR | 1.2 W High Efficiency Power Amplifier 800 - 960 MHz |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| AM50DL128BG70I | 制造商:Spansion 功能描述:Combo Mem 4Mx16/8Mx8 Flash + 2Mx16 PSRAM 3V 73-Pin FBGA |
| AM50DL128BG85I | 制造商:Spansion 功能描述:COMBO 4MX16/8MX8 FLASH + 2MX16 PSRAM 3V/3.3V 73FBGA - Trays |
| AM50DL128BH | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Stacked Multi-Chip Package (MCP) Flash Memory and SRAM |
| AM50DL128BH_04 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Two Am29DL640G 64 Megabit (8 M x 8-Bit/4 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memories |
| AM50DL128BH56I | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Stacked Multi-Chip Package (MCP) Flash Memory and SRAM |
發(fā)布緊急采購，3分鐘左右您將得到回復。