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參數(shù)資料
| 型號： | AM50DL128BG |
| 英文描述： | Am50DL128BG - Stacked Multi-Chip Package (MCP) Flash Memory and SRAM |
| 中文描述： | Am50DL128BG -堆疊式多芯片封裝（MCP）閃存和SRAM |
| 文件頁數(shù)： | 52/70頁 |
| 文件大?。?/td> | 1042K |
| 代理商： | AM50DL128BG |
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May 19, 2003
Am50DL9608G
51
P R E L I M I N A R Y
FLASH AC CHARACTERISTICS
Erase and Program Operations
Notes:
1. Not 100% tested.
2. See the “Flash Erase And Programming Performance” section for more information.
Parameter
All Speed Options
JEDEC
Std
Description
Unit
t
AVAV
t
WC
Write Cycle Time (Note 1)
Min
70
ns
t
AVWL
t
AS
Address Setup Time
Min
0
ns
t
ASO
Address Setup Time to OE# low during toggle bit polling
Min
15
ns
t
WLAX
t
AH
Address Hold Time
Am29DL640G
Min
40
ns
Am29DL320G
45
t
AHT
Address Hold Time From CE#f or OE# high
during toggle bit polling
Min
0
ns
t
DVWH
t
DS
Data Setup Time
Am29DL640G
Min
40
ns
Am29DL320G
35
t
WHDX
t
DH
Data Hold Time
Min
0
ns
t
OEPH
Output Enable High during toggle bit polling
Min
20
ns
t
GHWL
t
GHWL
Read Recovery Time Before Write
(OE# High to WE# Low)
Min
0
ns
t
WLEL
t
WS
WE# Setup Time (CE#f to WE#)
Min
0
ns
t
ELWL
t
CS
CE#f Setup Time
Min
0
ns
t
EHWH
t
WH
WE# Hold Time (CE#f to WE#)
Min
0
ns
t
WHEH
t
CH
CE#f Hold Time
Min
0
ns
t
WLWH
t
WP
Write Pulse Width
Min
30
ns
t
WHDL
t
WPH
Write Pulse Width High
Min
30
ns
t
SR/W
Latency Between Read and Write Operations
Min
0
ns
t
WHWH1
t
WHWH1
Programming Operation (Note 2)
Typ
7
μs
t
WHWH1
t
WHWH1
Accelerated Programming Operation,
Word or Byte (Note 2)
Typ
4
μs
t
WHWH2
t
WHWH2
Sector Erase Operation (Note 2)
Typ
0.4
sec
t
VCS
V
CC
Setup Time (Note 1)
Min
50
μs
t
RB
Write Recovery Time from RY/BY#
Min
0
ns
t
BUSY
Program/Erase Valid to RY/BY# Delay
Max
90
ns
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AM50DL128CG | 2 x 64 Mbit (8 M x 8-Bit/4 M x 16-Bit) CMOS and 64 Mbit (2 M x 16-Bit) Pseudo Static RAM (Preliminary) |
| AM50DL128CH | Am50DL128CH - Stacked Multi-Chip Package (MCP) Flash Memory and SRAM |
| AM52-0001 | 1.2 W High Efficiency Power Amplifier 800 - 960 MHz |
| AM52-0001SMB | 1.2 W High Efficiency Power Amplifier 800 - 960 MHz |
| AM52-0001TR | 1.2 W High Efficiency Power Amplifier 800 - 960 MHz |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AM50DL128BG70I | 制造商:Spansion 功能描述:Combo Mem 4Mx16/8Mx8 Flash + 2Mx16 PSRAM 3V 73-Pin FBGA |
| AM50DL128BG85I | 制造商:Spansion 功能描述:COMBO 4MX16/8MX8 FLASH + 2MX16 PSRAM 3V/3.3V 73FBGA - Trays |
| AM50DL128BH | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Stacked Multi-Chip Package (MCP) Flash Memory and SRAM |
| AM50DL128BH_04 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Two Am29DL640G 64 Megabit (8 M x 8-Bit/4 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memories |
| AM50DL128BH56I | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Stacked Multi-Chip Package (MCP) Flash Memory and SRAM |
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