參數(shù)資料
型號(hào)： AM79C970AKCW
廠商： ADVANCED MICRO DEVICES INC
元件分類(lèi)： 微控制器/微處理器
英文描述： PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product
中文描述： 2 CHANNEL(S), 10M bps, LOCAL AREA NETWORK CONTROLLER, PQFP132
封裝： PLASTIC, QFP-132
文件頁(yè)數(shù)： 127/219頁(yè)
文件大小： 1065K
代理商： AM79C970AKCW
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P R E L I M I N A R Y
AMD
127
Am79C970A
15–0 CRBAU
Contains the upper 16 bits of the
current receive buffer address at
which the PCnet-PCI II controller
will store incoming frame data.
Read/Write
accessible
when either the STOP or the
SPND bit is set. These bits
are unaffected by H_RESET,
S_RESET or by setting the
STOP bit.
only
CSR20: Current Transmit Buffer Address Lower
Bit
Name
Description
31–16
RES
Reserved locations. Written as
ZEROs and read as undefined.
15–0
CXBAL
Contains the lower 16 bits of the
current transmit buffer address
from which the PCnet-PCI II con-
troller is transmitting.
Read/Write
accessible
when either the STOP or the
SPND bit is set. These bits
are unaffected by H_RESET,
S_RESET or by setting the
STOP bit.
only
CSR21: Current Transmit Buffer Address Upper
Bit
Name
Description
31–16
RES
Reserved locations. Written as
ZEROs and read as undefined.
Contains the upper 16 bits of the
current transmit buffer address
from which the PCnet-PCI II con-
troller is transmitting.
Read/Write
accessible
when either the STOP or the
SPND bit is set. These bits
are unaffected by H_RESET,
S_RESET or by setting the
STOP bit.
15–0 CXBAU
only
CSR22: Next Receive Buffer Address Lower
Bit
Name
Description
31–16
RES
Reserved locations. Written as
ZEROs and read as undefined.
Contains the lower 16 bits of the
next receive buffer address to
which the PCnet-PCI II controller
will store incoming frame data.
15–0
NRBAL
Read/Write
when either the STOP or the
SPND bit is set. These bits
are unaffected by H_RESET,
S_RESET or by setting the
STOP bit.
accessible
only
CSR23: Next Receive Buffer Address Upper
Bit
Name
Description
31–16
RES
Reserved locations. Written as
ZEROs and read as undefined.
Contains the upper 16 bits of the
next receive buffer address to
which the PCnet-PCI II controller
will store incoming frame data.
Read/Write
accessible
when either the STOP or the
SPND bit is set. These bits
are unaffected by H_RESET,
S_RESET or by setting the
STOP bit.
15–0 NRBAU
only
CSR24: Base Address of Receive Descriptor
Ring Lower
Bit
Name
Description
31–16
RES
Reserved locations. Written as
ZEROs and read as undefined.
Contains the lower 16 bits of the
base address of the receive
descriptor ring.
Read/Write
accessible
when either the STOP or the
SPND bit is set. These bits
are unaffected by H_RESET,
S_RESET or by setting the
STOP bit.
15–0
BADRL
only
CSR25: Base Address of Receive Descriptor
Ring Upper
Bit
Name
Description
31–16
RES
Reserved locations. Written as
ZEROs and read as undefined.
Contains the upper 16 bits of the
base address of the receive
descriptor ring.
Read/Write
accessible
when either the STOP or the
SPND bit is set. These bits
are unaffected by H_RESET,
15–0 BADRU
only
相關(guān)PDF資料
PDF描述
AM79C970AKC PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product
AM79C970A PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product
AM79C970AVCW PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product
AM79C970 PCnetTM-PCI Single-Chip Ethernet Controller for PCI Local Bus
AM79C971VCW PCnet⑩-FAST Single-Chip Full-Duplex 10/100 Mbps Ethernet Controller for PCI Local Bus
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AM79C970AVC 制造商:Advanced Micro Devices 功能描述:
AM79C970AVC\\W 制造商:Advanced Micro Devices 功能描述: 制造商:Rochester Electronics LLC 功能描述:
AM79C970AVC\W 制造商:Advanced Micro Devices 功能描述: 制造商:Rochester Electronics LLC 功能描述: 制造商:AMD 功能描述:
AM79C970AVC-G 制造商:Rochester Electronics LLC 功能描述:
AM79C970AVCW 制造商:AMD 制造商全稱(chēng):Advanced Micro Devices 功能描述:PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product
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