參數(shù)資料
型號(hào): AM79C970AKCW
廠商: ADVANCED MICRO DEVICES INC
元件分類: 微控制器/微處理器
英文描述: PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product
中文描述: 2 CHANNEL(S), 10M bps, LOCAL AREA NETWORK CONTROLLER, PQFP132
封裝: PLASTIC, QFP-132
文件頁(yè)數(shù): 167/219頁(yè)
文件大?。?/td> 1065K
代理商: AM79C970AKCW
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)第135頁(yè)第136頁(yè)第137頁(yè)第138頁(yè)第139頁(yè)第140頁(yè)第141頁(yè)第142頁(yè)第143頁(yè)第144頁(yè)第145頁(yè)第146頁(yè)第147頁(yè)第148頁(yè)第149頁(yè)第150頁(yè)第151頁(yè)第152頁(yè)第153頁(yè)第154頁(yè)第155頁(yè)第156頁(yè)第157頁(yè)第158頁(yè)第159頁(yè)第160頁(yè)第161頁(yè)第162頁(yè)第163頁(yè)第164頁(yè)第165頁(yè)第166頁(yè)當(dāng)前第167頁(yè)第168頁(yè)第169頁(yè)第170頁(yè)第171頁(yè)第172頁(yè)第173頁(yè)第174頁(yè)第175頁(yè)第176頁(yè)第177頁(yè)第178頁(yè)第179頁(yè)第180頁(yè)第181頁(yè)第182頁(yè)第183頁(yè)第184頁(yè)第185頁(yè)第186頁(yè)第187頁(yè)第188頁(yè)第189頁(yè)第190頁(yè)第191頁(yè)第192頁(yè)第193頁(yè)第194頁(yè)第195頁(yè)第196頁(yè)第197頁(yè)第198頁(yè)第199頁(yè)第200頁(yè)第201頁(yè)第202頁(yè)第203頁(yè)第204頁(yè)第205頁(yè)第206頁(yè)第207頁(yè)第208頁(yè)第209頁(yè)第210頁(yè)第211頁(yè)第212頁(yè)第213頁(yè)第214頁(yè)第215頁(yè)第216頁(yè)第217頁(yè)第218頁(yè)第219頁(yè)
P R E L I M I N A R Y
AMD
167
Am79C970A
LCOL is set. The value of the
ONE bit is written by the
PCnet-PCI II controller. This bit
has meaning only if the ENP bit
is set.
26
DEF
Deferred indicates that the
PCnet-PCI II controller had to
defer while trying to transmit a
frame. This condition occurs if
the channel is busy when the
PCnet-PCI II controller is ready
to transmit. DEF is set by
the PCnet-PCI II controller and
cleared by the host.
25
STP
Start of Packet indicates that
this is the first buffer to be used
by the PCnet-PCI II controller
for this frame. It is used for data
chaining buffers. The STP bit
must be set in the first buffer of
the frame, or the PCnet-PCI II
controller will skip over the
descriptor and poll the next de-
scriptor(s) until the OWN and
STP bits are set. STP is set by
the host and is not changed by
the PCnet-PCI II controller.
24
ENP
End of Packet indicates that this
is the last buffer to be used by the
PCnet-PCI II controller for this
frame. It is used for data chaining
buffers. If both STP and ENP
are set, the frame fits into one
buffer and there is no data
chaining. ENP is set by the host
and is not changed by the
PCnet-PCI II controller.
23
BPE
Bus Parity Error is set by the
PCnet-PCI II controller when a
parity error occurred on the bus
interface during a data transfers
from the transmit buffer associ-
ated with this descriptor. The
PCnet-PCI II controller will only
set BPE when the advanced par-
ity error handling is enabled by
setting APERREN (BCR20, bit
10) to ONE. BPE is set by the
PCnet-PCI II controller and
cleared by the host.
This bit does not exist, when the
PCnet-PCI II controller is pro-
grammed to use 16-bit software
structures for the descriptor
ring entries (BCR20, bits 7–0,
SWSTYLE is cleared to ZERO).
22–16
RES
Reserved locations.
15–12 ONES
These four bits must be written
as ONEs. This field is written by
the host and unchanged by the
PCnet-PCI II controller.
11–00 BCNT
Buffer Byte Count is the usable
length of the buffer pointed to by
this descriptor, expressed as the
two’s complement of the length
of the buffer. This is the
number of bytes from this buffer
that will be transmitted by the
PCnet-PCI II controller. This field
is written by the host and is not
changed by the PCnet-PCI II
controller. There are no minimum
buffer size restrictions.
TMD2
Bit
Name
Description
31
BUFF
Buffer
the PCnet-PCI II controller
during transmission when the
PCnet-PCI II controller does not
find the ENP flag in the current
descriptor and does not own the
next descriptor. This can occur in
either of two ways:
error
is
set
by
1. The OWN bit of the next de-
scriptor is ZERO.
2. FIFO underflow occurred be-
fore the PCnet-PCI II con-
troller obtained the STATUS
byte (TMD1[31:24]) of the
next descriptor. BUFF is set
by the PCnet-PCI II controller
and cleared by the host.
If a Buffer Error occurs, an Un-
derflow Error will also occur.
BUFF is not valid when LCOL or
RTRY error is set during transmit
data chaining. BUFF is set by
the PCnet-PCI II controller and
cleared by the host.
30
UFLO
Underflow error indicates that the
transmitter has truncated a mes-
sage because it could not read
data from memory fast enough.
UFLO indicates that the FIFO
has emptied before the end of the
frame was reached.
When DXSUFLO (CSR3, bit 6) is
cleared to ZERO, the transmitter
is turned off when an UFLO error
occurs (CSR0, TXON = 0).
When DXSUFLO is set to ONE,
the PCnet-PCI II controller
gracefully recovers from an
UFLO error. It scans the transmit
descriptor ring until it finds the
相關(guān)PDF資料
PDF描述
AM79C970AKC PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product
AM79C970A PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product
AM79C970AVCW PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product
AM79C970 PCnetTM-PCI Single-Chip Ethernet Controller for PCI Local Bus
AM79C971VCW PCnet⑩-FAST Single-Chip Full-Duplex 10/100 Mbps Ethernet Controller for PCI Local Bus
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AM79C970AVC 制造商:Advanced Micro Devices 功能描述:
AM79C970AVC\\W 制造商:Advanced Micro Devices 功能描述: 制造商:Rochester Electronics LLC 功能描述:
AM79C970AVC\W 制造商:Advanced Micro Devices 功能描述: 制造商:Rochester Electronics LLC 功能描述: 制造商:AMD 功能描述:
AM79C970AVC-G 制造商:Rochester Electronics LLC 功能描述:
AM79C970AVCW 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product