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參數(shù)資料
| 型號(hào)： | AM79C972BKIW |
| 廠商： | ADVANCED MICRO DEVICES INC |
| 元件分類(lèi)： | 微控制器/微處理器 |
| 英文描述： | PCnet⑩-FAST+ Enhanced 10/100 Mbps PCI Ethernet Controller with OnNow Support |
| 中文描述： | 5 CHANNEL(S), 100M bps, LOCAL AREA NETWORK CONTROLLER, PQFP16 |
| 封裝： | PLASTIC, QFP-160 |
| 文件頁(yè)數(shù)： | 57/130頁(yè) |
| 文件大?。?/td> | 1580K |
| 代理商： | AM79C972BKIW |
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Am79C972
57
Media Access Control
The Media Access Control (MAC) engine incorporates
the essential protocol requirements for operation of an
Ethernet/IEEE 802.3-compliant node and provides the
interface between the FIFO subsystem and the MII.
This section describes operation of the MAC engine
when operating in half-duplex mode. When operating in
half-duplex mode, the MAC engine is fully compliant to
Section 4 of ISO/IEC 8802-3 (ANSI/IEEE Standard
1990 Second Edition) and ANSI/IEEE 802.3 (1985).
When operating in full-duplex mode, the MAC engine
behavior changes as described in the section
Full-
Duplex Operation
.
The MAC engine provides programmable enhanced
features designed to minimize host supervision, bus
utilization, and pre- or post-message processing.
These features include the ability to disable retries after
a collision, dynamic FCS generation on a frame-by-
frame basis, automatic pad field insertion and deletion
to enforce minimum frame size attributes, automatic re-
transmission without reloading the FIFO, and auto-
matic deletion of collision fragments.
The two primary attributes of the MAC engine are:
Transmit and receive message data encapsulation
—
Framing (frame boundary delimitation, frame
synchronization)
—
Addressing (source and destination address
handling)
—
Error detection (physical medium transmission
errors)
Media access management
—
Medium allocation (collision avoidance, except
in full-duplex operation)
—
Contention resolution (collision handling, except
in full-duplex operation)
Transmit and Receive Message Data Encapsulation
The MAC engine provides minimum frame size en-
forcement for transmit and receive frames. When
APAD_XMT (CSR, bit 11) is set to 1, transmit mes-
sages will be padded with sufficient bytes (containing
00h) to ensure that the receiving station will observe an
information field (destination address, source address,
length/type, data, and FCS) of 64 bytes. When
ASTRP_RCV (CSR4, bit 10) is set to 1, the receiver will
automatically strip pad bytes from the received mes-
sage by observing the value in the length field and by
stripping excess bytes if this value is below the mini-
mum data size (46 bytes). Both features can be inde-
pendently over-ridden to allow illegally short (less than
64 bytes of frame data) messages to be transmitted
and/or received. The use of this feature reduces bus
utilization because the pad bytes are not transferred
into or out of main memory.
Framing
The MAC engine will autonomously handle the con-
struction of the transmit frame. Once the transmit FIFO
has been filled to the predetermined threshold (set by
XMTSP in CSR80) and access to the channel is cur-
rently permitted, the MAC engine will commence the 7-
byte preamble sequence (10101010b, where first bit
transmitted is a 1). The MAC engine will subsequently
append the Start Frame Delimiter (SFD) byte
(10101011b) followed by the serialized data from the
transmit FIFO. Once the data has been completed, the
MAC engine will append the FCS (most significant bit
first) which was computed on the entire data portion of
the frame. The data portion of the frame consists of
destination address, source address, length/type, and
frame data. The user is responsible for the correct or-
dering and content in each of these fields in the frame.
The MAC does not use the content in the length/type
field unless APAD_XMT (CSR4, bit 11) is set and the
data portion of the frame is shorter than 60 bytes.
During GPSI operation, the MAC will discard the first 8
bits of information before searching for the SFD se-
quence. Once the SFD is detected, all subsequent bits
are treated as part of the frame. During MII operation,
the MAC engine will detect the incoming preamble se-
quence when the RX_DV signal is activated by the ex-
ternal PHY. The MAC will discard the preamble and
begin searching for the SFD except in the case of
100BASE-T4. In that case, the SFD will be the first nib-
ble across the MII interface. Once the SFD is detected,
all subsequent nibbles are treated as part of the frame.
The MAC engine will inspect the length field to ensure
minimum frame size, strip unnecessary pad characters
(if enabled), and pass the remaining bytes through the
receive FIFO to the host. If pad stripping is performed,
the MAC engine will also strip the received FCS bytes,
although normal FCS computation and checking will
occur. Note that apart from pad stripping, the frame will
be passed unmodified to the host. If the length field has
a value of 46 or greater, all frame bytes including FCS
will be passed unmodified to the receive buffer, regard-
less of the actual frame length.
If the frame terminates or suffers a collision before 64
bytes of information (after SFD) have been received,
the MAC engine will automatically delete the frame
from the receive FIFO, without host intervention. The
Am79C972 controller has the ability to accept runt
packets for diagnostic purposes and proprietary net-
works.
Destination Address Handling
The first 6 bytes of information after SFD will be inter-
preted as the destination address field. The MAC en-
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AM79C972BVC | 制造商:Advanced Micro Devices 功能描述: |
| AM79C972BVC\W | 制造商:Advanced Micro Devices 功能描述:Ethernet CTLR Single Chip 10Mbps/100Mbps 3.3V 176-Pin TQFP Tray 制造商:Advanced Micro Devices 功能描述:5 CHANNEL(S), 100M bps, LOCAL AREA NETWORK CONTROLLER, PQFP176 |
| AM79C972BVCW | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:PCnet⑩-FAST+ Enhanced 10/100 Mbps PCI Ethernet Controller with OnNow Support |
| AM79C972BVD\\W | 制造商:Advanced Micro Devices 功能描述: |
| AM79C972BVD\W | 制造商:Advanced Micro Devices 功能描述:Ethernet CTLR Single Chip 10Mbps/100Mbps 3.3V 176-Pin TQFP Tray |
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