參數(shù)資料
型號(hào): AM79C983AKC
廠商: ADVANCED MICRO DEVICES INC
元件分類: 網(wǎng)絡(luò)接口
英文描述: Integrated Multiport Repeater 2 (IMR2⑩)
中文描述: DATACOM, ETHERNET TRANSCEIVER, PQFP132
封裝: PLASTIC, QFP-132
文件頁(yè)數(shù): 44/60頁(yè)
文件大?。?/td> 348K
代理商: AM79C983AKC
44
Am79C983A
P R E L I M I N A R Y
Auto Partitions
Address:
1110 1011
Auto Partitions is a read-only attribute that counts the
number of instances where the repeater has partitioned
this port from the network. This attribute is a 32-bit counter
that is incremented on each such event. The approximate
minimum time between counter rollovers is 20 days.
Source Address Changes
Address:
1110 1100
Source Address Changes is a read-only attribute that
counts the number of times the source address field of
valid frames received on a port changes. This attribute
is a 32-bit counter with a minimum rollover of 81 hours.
Note:
This may indicate whether a link is connected to
a single DTE or another multi-user segment.
Readable Broadcast Frames
Address:
1110 1101
The counter is incremented by one each time this port
receives an error-free broadcast frame.
Last Source Address
Address:
1110 1110
D Port Read/Write
Last Source Address is a read/write attribute and is the
source address of the last readable frame received by
this port.
This 6-byte register may be read from or written to. This
feature allows the software to preset this attribute to the
known Node ID for a single node segment. A change in
the contents of this register would then signal an anom-
aly. This will cause the Source Address Changes at-
tribute to increment. Furthermore, setting the
respective PAUI/AUI/RAUI Port Source Address
Change Interrupt Enable bit (in the Port Control Regis-
ters) can be used to generate a hardware interrupt to
signal the software to automatically disable this port.
Readable Multicast Frames
Address:
1110 1111
The counter is incremented by one each time this port
receives an error-free multicast frame. Broadcast
frames are not counted.
Preferred Source Address
Address:
1111 0000
The address programmed into this register is compared
with the incoming source address to generate a Source
Address Changed Interrupt. This is a 6-byte word. The
operation will abort if all 6 bytes are not written.
bit 0
bit
31
bit
24
D Port Read
LSB
Byte 0
Byte 1
Byte 2
Byte 3
bit 7
MSB
bit 0
bit
31
bit
24
D Port Read
LSB
Byte 0
Byte 1
Byte 2
Byte 3
bit 7
MSB
bit 0
bit
31
bit
24
D Port Read
LSB
Byte 0
Byte 1
Byte 2
Byte 3
bit 7
MSB
bit 7
bit 0
bit
47
bit 40
MSB
LSB
Byte 0
Byte 1
Byte 2
Byte 4
Byte 5
Byte 3
bit 0
bit
31
bit
24
D Port Read
LSB
Byte 0
Byte 1
Byte 2
Byte 3
bit 7
MSB
bit 7
bit 0
bit
47
bit 40
D Port Read/Write
MSB
LSB
Byte 0
Byte 1
Byte 2
Byte 4
Byte 5
Byte 3
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