參數(shù)資料
型號(hào)： AMC1210IRHARG4
英文描述： Quad Digital Filter for 2nd-Order Delta-Sigma Modulator
中文描述： 四數(shù)字濾波器2階Δ-Σ調(diào)制器
文件頁(yè)數(shù)： 20/47頁(yè)
文件大?。?/td> 805K
代理商： AMC1210IRHARG4
www.ti.com
ACK
I/O
CLKx
INx
DATA
REGISTER
Previous Value
DATA VALID
READ INTERRUPT REGISTER
READ DATA REGISTER
AMC1210
SBAS372A–APRIL 2006–REVISED OCTOBER 2006
The sinc filter has a bit width of 25 bits and a signed two's complementary data representation. The maximum
possible resolution gives a 26-bit word (+/-16,777,216). Note that this value is only reached if the delta-sigma
modulator is operated at absolute maximum positive or negative full-scale, which is beyond the recommended
full-scale range of 80% of most delta-sigma modulators. This value also does not represent the resolution of the
signal. The signal resolution is determined by the modulator, and increasing the filter bit width will not offer any
improved noise performance beyond the modulator capabilities.
Figure 17
shows how a typical application would use the digital filter. When the filter is enabled, it is continuously
processing data and generating output words. When an output word is ready to read, the processor is first
triggered by a rising edge on the ACK pin. Then the
Interrupt Register
is read to check which filter module
generated new data. Once all valid data registers have been read, the ACK pin goes low.
The data registers can be up to 32 bits.
Figure 17. Typical Data Read Sequence
20
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