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| 型號： | AMC1210IRHARG4 |
| 英文描述： | Quad Digital Filter for 2nd-Order Delta-Sigma Modulator |
| 中文描述： | 四數(shù)字濾波器2階Δ-Σ調(diào)制器 |
| 文件頁數(shù)： | 38/47頁 |
| 文件大?。?/td> | 805K |
| 代理商： | AMC1210IRHARG4 |
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SOSR
ISOR
f
MODULATOR
f
CARRIER
2000
(8)
ENOB
ENOB_Sincfilter
ENOB_Integrator
14
2
16
(9)
f
SINC3
f
MODULATOR
SOSR
128kHz
(10)
f
INTEGRATOR
f
SINC3
IOSR
8kHz
(11)
AMC1210
SBAS372A–APRIL 2006–REVISED OCTOBER 2006
APPLICATION INFORMATION (continued)
For this example, running the ADS1205 at 16MHz works well.
Equation 8
gives the total OSR.
At this point, the sinc filter oversampling ratio (SOSR) and the integrator oversampling ratio (IOSR) can be
defined. From
Figure 15
, we can see that the best value for ENOB for equivalent OSR values comes from the
Sinc
3
filter. Therefore, it makes the most sense to choose the Sinc
3
filter with a high OSR value. To satisfy
Equation 8
, the product of the SOSR and ISOR must be 2000. Choosing a Sinc
3
filter with an SOSR value of
125
and
an
ISOR
value
of
16
produces
this
result,
and
gives
the
following
ENOB:
With these values, we can calculate the frequency of data coming out of the Sinc
3
filter:
and the frequency of data coming out of the integrator:
The demodulation function allows the integrator to sum a full rectified cycle of the carrier signal. When choosing
IOSR = 16, the integrator will sum 16 samples of the digital filter. The demodulation causes a loss of ENOB of
approximately 0.5LSB. This demodulation error gives a total system ENOB = 15.5.
In order for this function to work correctly, the phase must be properly aligned between the carrier frequency and
the modulator. To perform phase calibration, the carrier frequency, resolver and modulator must be running at
the desired rate.
Calculating the angle from two separate channels requires both channels integrating over the same period of
time. To ensure that the integrators in separate channels are triggered at the same point in time, the bit MFE in
the
Clock Divider Register
can be used. When MFE is low, all sinc filters are disabled. Conversely, when MFE
goes high, all sinc filters that have bit FEN in the Sinc Filter Parameter register high are enabled. The integrator
period, when in oversampling mode, is triggered by enabling the sinc filter. Therefore, when MFE goes high, all
integrator periods are started simultaneously. This event only works if every other set-up procedure is done
before MFE is set high.
38
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